William Plishker

TL;DR: The parallel landscape is frame with seven questions, and the following are recommended to explore the design space rapidly: • The overarching goal should be to make it easy to write programs that execute efficiently on highly parallel computing systems • The target should be 1000s of cores per chip, as these chips are built from processing elements that are the most efficient in MIPS (Million Instructions per Second) per watt, MIPS per area of silicon, and MIPS each development dollar.

TL;DR: This work introduces a new dataflow model of computation, called enable-invoke dataflow (EIDF), that supports flexible and efficient prototyping of dataflow-based application representations and permits the natural description of actors for dynamic and static dataflow models.

TL;DR: NP-Click is a programming model for a common network processor, the Intel IXP 1200, designed to ease three major difficulties of programming network processors: taking advantage of hardware parallelism, arbitration of shared resources, and efficient data layout.

TL;DR: The clinical implementation of 4D treatment planning is critically dependent on automatic segmentation, for which a free-form deformation-based nonrigid image registration algorithm is offered one of the most accurate algorithms yet presented.

TL;DR: Results for the Intel IXP1200 indicate that NP-Click delivers a large productivity gain at a slight performance expense, and a simple programming model that permits programmers to reap the benefits of a domain specific language while still allowing for target-specific optimizations.