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Author

William R. Eisenstadt

Other affiliations: Motorola
Bio: William R. Eisenstadt is an academic researcher from University of Florida. The author has contributed to research in topics: CMOS & Signal integrity. The author has an hindex of 28, co-authored 145 publications receiving 3970 citations. Previous affiliations of William R. Eisenstadt include Motorola.


Papers
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Journal ArticleDOI
Abstract: A theory for combined differential and common-mode normalized power waves is developed in terms of even and odd mode impedances and propagation constants for a microwave coupled line system. These are related to even and odd-mode terminal currents and voltages. Generalized s-parameters of a two-port are developed for waves propagating in several coupled modes. The two-port s-parameters form a 4-by-4 matrix containing differential-mode, common-mode, and cross-mode s-parameters. A special case of the theory allows the use of uncoupled transmission lines to measure the coupled-mode waves. Simulations verify the concept of these mixed-mode s-parameters, and demonstrate conversion from mode to mode for asymmetric microwave structures. >

780 citations

Journal ArticleDOI
TL;DR: In this article, a methodology for extracting high-frequency IC interconnect transmission parameters directly from S-parameter measurements has been demonstrated using on-chip test structures, which consists of: (1) building onchip interconnect structures for microwave test, (2) characterizing and subtracting measurement system parasitics, extracting the transmission line impedance and propagation constant (attenuation constant and phase constant) from the calibrated data, and (4) extracting the Telegrapher's Equation transmission parameters (R, L, C, and G).
Abstract: A methodology for extracting high-frequency IC interconnect transmission parameters directly from S-parameter measurements has been demonstrated using on-chip test structures. The methodology consists of: (1) building on-chip interconnect structures for microwave test, (2) characterizing and subtracting measurement system parasitics, (3) extracting the transmission line impedance and propagation constant (attenuation constant and phase constant) from the calibrated data, and (4) extracting the Telegrapher's Equation transmission parameters (R, L, C, and G). Additional on-chip calibration permits subtraction of pad parasitic effects. This methodology is demonstrated over a 45-MHz to 20-GHz frequency range using an example 1-cm-long, 4- mu m-wide IC interconnect built in an advanced BiCMOS technology. Variations in interconnect impedance and capacitance indicate two signal propagation modes. Significant substrate-based loss is measured at microwave frequencies. >

627 citations

Journal ArticleDOI
TL;DR: In this paper, a first-level-metal single-conductor IC interconnect model is developed for high-speed and high-density VLSI circuit design, which includes effects such as capacitive fringing and the influence of substrate conductance.
Abstract: A first-level-metal single-conductor IC interconnect model is developed for high-speed and high-density VLSI circuit design. The model shows interconnect circuit parameters that vary with frequency. Existing interconnect models exclude effects such as capacitive fringing and the influence of substrate conductance. The new model represents fine-line as well as wide-line interconnect behavior over a 20-GHz frequency range and includes these effects. The model parameters are compared to scattering parameter measurements as well as numerical simulations based on PISCES-II. Excellent agreement is shown with S-parameter measurements. >

299 citations

Patent
18 Dec 1990
TL;DR: The x-ray imaging system in this paper comprises an x ray source for producing an xray beam having an energy of at least 30 kVp and an x-rays detector consisting a solid state integrated circuit having a silicon substrate and a plurality of charge storage devices.
Abstract: The x-ray imaging system comprises an x-ray source for producing an x-ray beam having an energy of at least 30 kVp and an x-ray detector. The x-ray detector comprises a solid state integrated circuit having a silicon substrate and a plurality of charge storage devices. The detector is responsive to x-rays of at least 30 keV to directly produce free electrons which interact with the charge storage devices.

239 citations

Book
01 Jan 2006
TL;DR: In this paper, the authors describe mixed-mode scattering parameter techniques and their applications in microwave circuit design, straight from the inventors of the techniques themselves, and present practical techniques that help you more effectively analyze differential and multi-port systems.
Abstract: Gain hands-on understanding of powerful new mixed-mode scattering parameter techniques and their applications in microwave circuit design, straight from the inventors of the techniques themselves. This groundbreaking resource uses the original research and application work in the field to describe mixed-mode S-parameter principles. Supported with over 150 illustrations, the book thoroughly explains practical techniques that help you more effectively analyze differential and multi-port systems; measure and describe multi-port circuit performance; and conduct differential circuit analyses for isolation, crosstalk, stability, noise reduction, and balance. Moreover, the book enables you to achieve greater signal integrity, offering you cutting-edge design guidance on couplers, transformers, baluns, circulators, splitters, filters, and other components. You learn powerful techniques that help you transform a haystack of single-ended microwave data into cogent differential design-oriented results, eliminate errors inherent with single-ended measurements, and speed circuit modeling and design while greatly expanding their regions of stable operation. Balanced circuit design issues such as mode specific matching, CMRR, and mode conversion are also addressed in depth.

217 citations


Cited by
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Journal ArticleDOI
TL;DR: Physical mechanisms responsible for nondestructive single-event effects in digital microelectronics are reviewed, concentrating on silicon MOS devices and integrated circuits as discussed by the authors, and the impact of technology trends on single event susceptibility and future areas of concern are explored.
Abstract: Physical mechanisms responsible for nondestructive single-event effects in digital microelectronics are reviewed, concentrating on silicon MOS devices and integrated circuits. A brief historical overview of single-event effects in space and terrestrial systems is given, and upset mechanisms in dynamic random access memories, static random access memories, and combinational logic are detailed. Techniques for mitigating single-event upset are described, as well as methods for predicting device and circuit single-event response using computer simulations. The impact of technology trends on single-event susceptibility and future areas of concern are explored.

1,028 citations

Journal ArticleDOI
TL;DR: In this article, the authors present a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance in the spiral, substrate ohmic loss, and substrate capacitance.
Abstract: This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance.

867 citations

Journal Article
TL;DR: In this article, the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate were observed. And the authors showed that in such cases the substrate noise is highly dependent on layout geometry.
Abstract: An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >

567 citations

Book
01 Jul 2006
TL;DR: This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time- to-volume.

522 citations