There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

[신간의 별자리x] 우리/미술, 그리고 ‘슬픔의 박물관’

Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

Power semiconductor devices and methods of manufacture

A power semiconductor device includes trenches disposed in a first base layer of a first conductivity type at intervals to partition main and dummy cells, at a position remote from a collector layer of a second conductivity type. In the main cell, a second base layer of the second conductivity type, and an emitter layer of the first conductivity type are disposed. In the dummy cell, a buffer layer of the second conductivity type is disposed. A gate electrode is disposed, through a gate insulating film, in a trench adjacent to the main cell. A buffer resistor having an infinitely large resistance value is inserted between the buffer layer and emitter electrode. The dummy cell is provided with an inhibiting structure to reduce carriers of the second conductivity type to flow to and accumulate in the buffer layer from the collector layer.

Power semiconductor device

This invention clarifies the effects of parameters and enables the mass production of a super-junction semiconductor device, which has a drift layer composed of a parallel pn layer that conducts electricity in the ON state and is depleted in the OFF state. The quantity of impurities in n drift regions is within the range between 100% and 150% or between 110% and 150% of the quantity of impurities in p partition regions. The impurity density of either one of the n drift regions and the p partition regions is within the range between 92% and 108% of the impurity density of the other regions. In addition, the width of either one of the n drift regions and the p partition regions is within the range between 94% and 106% of the width of the other regions.

Semiconductor device with alternating conductivity type layer and method of manufacturing the same

A semiconductor power device wherein the reverse voltage across the p + -regions(s) and the n + -regions(s) is sustained by a composite buffer layer, shortly as CB-layer. The CB-layer contains two kinds of semiconductor regions with opposite types of conduction. These two kinds of regions are alternatively arranged, viewed from any cross-section parallel to the interface between the layer itself and the n + (or p + )-region. Whereas the hitherto-used voltage sustaining layer contains only one kind of semiconductor with single type of conduction in the same sectional view. Design guidelines are also provided in this invention. The relation between the on-resistance in unit area Ron and the breakdown voltage V B of the CB-layer invented is Ron ocV B 113 which represents a breakthrough to the conventional voltage sustaining layer, whereas the other performances of the power devices remain almost unchanged.

Semiconductor power devices with alternating conductivity type high-voltage breakdown regions

Theory of a novel voltage-sustaining layer for power devices

A surface voltage sustaining structure around an n + (or p + )-type region on a p - (or n - )-type substrate for high-voltage devices is made by a combination of n-type regions and/or p-type regions and produces an effective surface density of donor (or acceptor) decreasing with the distance to the n + (or p + )-type region on the surface, when all of the regions are depleted under reverse breakdown voltage. The surface voltage sustaining structure can make the breakdown voltage of the n + -p - (or p + -n - )-junction reach more than 90% of that one-sided parallel plane junction with the same substrate doping concentration. High-voltage vertical devices as well as high-voltage lateral devices with fast response, low on-voltage and high current density can be made by using this invention.

Surface voltage sustaining structure for semiconductor devices

A vertical power MOSFET with an interdigitated drift region using high- $k$ (Hk) insulator (Hk-MOSFET) is studied. Due to the fact that most of the electric displacement lines produced by the charges of the depleted drift region under reverse bias are through the Hk insulator, much heavier doping concentration can be used in the drift region when comparing with a conventional MOSFET with the same breakdown voltage. It is shown that the specific on-resistance of the Hk-MOSFET is comparable to that of the superjunction MOSFET (SJ-MOSFET) with the same breakdown voltage. The turn-on and turn-off times are found to be little longer than those of the conventional MOSFET and the SJ-MOSFET. The theoretical results of the electrical characteristics are in good agreement with the results from numerical simulations.

A Vertical Power MOSFET With an Interdigitated Drift Region Using High- $k$ Insulator

A lateral double-diffusion MOSFET with a uniform high-permittivity (HK) dielectric field plate (FP) is manufactured and presented in this letter. The HK dielectric FP is capable of cutting both electric peak fields at the channel p-n junction and the edge of FP, providing higher breakdown voltage (BV) based on a novel mechanism. The Pb(Zr0.53, Ti0.47)O3 (PZT) is taken as the HK dielectric material for its large preanneal permittivity. The test results indicate that, based on two identical devices except for the dielectric material, the BV of the one with PZT FP is more than three times of that of the counterpart with a SiO2 dielectric, approximately 350 and 100 V, respectively.

Xingbi Chen

Papers

Semiconductor power devices with alternating conductivity type high-voltage breakdown regions

Theory of a novel voltage-sustaining layer for power devices

Surface voltage sustaining structure for semiconductor devices

A Vertical Power MOSFET With an Interdigitated Drift Region Using High- $k$ Insulator

Analysis and Fabrication of an LDMOS With High-Permittivity Dielectric