Yann Hu

Bio: Yann Hu is an academic researcher from University of Strasbourg. The author has contributed to research in topics: CMOS & Noise (electronics). The author has an hindex of 13, co-authored 101 publications receiving 1053 citations. Previous affiliations of Yann Hu include Centre national de la recherche scientifique & International Pentecostal Holiness Church.

A monolithic active pixel sensor for charged particle tracking and imaging using standard VLSI CMOS technology

Abstract: A novel Monolithic Active Pixel Sensor (MAPS) for charged particle tracking made in a standard CMOS technology is proposed. The sensor is a photodiode, which is readily available in a CMOS technology. The diode has a special structure, which allows the high detection efficiency required for tracking applications. The partially depleted thin epitaxial silicon layer is used as a sensitive detector volume. Semiconductor device simulation, using either ToSCA based or 3-D ISE-TCAD software packages shows that the charge collection is efficient, reasonably fast (order of 100 ns), and the charge spreading limited to a few pixels only. A first prototype has been designed, fabricated and tested. It is made of four arrays each containing 64×64 pixels, with a readout pitch of 20 μm in both directions. The device is fabricated using standard submicron 0.6 μm CMOS process, which features twin-tub implanted in a p-type epitaxial layer, a characteristic common to many modern CMOS VLSI processes. Extensive tests made with soft X-ray source ( 55 Fe) and minimum ionising particles (15 GeV/ c pions) fully demonstrate the predicted performances, with the individual pixel noise (ENC) below 20 electrons and the Signal-to-Noise ratio for both 5.9 keV X-rays and Minimum Ionising Particles (MIP) of the order of 30. This novel device opens new perspectives in high-precision vertex detectors in Particle Physics experiments, as well as in other application, like low-energy beta particle imaging, visible light single photon imaging (using the Hybrid Photon Detector approach) and high-precision slow neutron imaging.

Design and testing of monolithic active pixel sensors for charged particle tracking

Abstract: A monolithic active pixel sensor (MAPS) for charged particle tracking based on a novel detector structure was proposed, simulated, fabricated and tested. The detector designed accordingly to this idea is inseparable from the readout electronics, since both of them are integrated onto the same, standard for a CMOS process, low-resistivity silicon wafer. The individual pixel is comprised of only 3 MOS transistors and a photodiode collecting the charge created in a thin undepleted epitaxial layer. This approach provides the whole detector surface sensitive to radiation (100% fill factor) with reduced pixel pitch(very high spatial resolution). This yields a low cost, high resolution and thin detecting device. The detailed device simulations using an ISE-TCAD package have been carried out in order to study a charge collection mechanism and to validate the proposed idea. Consequently, two prototype chips have been fabricated using 0.6 /spl mu/m and 0.35 /spl mu/m CMOS processes. Special radiation tolerant layout techniques were used in the second chip design. Both chips were tested and fully characterised. The pixel conversion gain was calibrated using 5.9 keV photons and prototype devices were exposed to the 120 GeV/c pion beams at CERN. Obtained results preceded by general design ideas and simulation results are reviewed.

CASTOR a VLSI CMOS mixed analog—digital circuit for low noise multichannel counting applications

Abstract: In this paper we present the design and first experimental results of a VLSI mixed analog-digital 1.2 microns CMOS circuit (CASTOR) for multichannel radiation detectors applications demanding low noise amplification and counting of radiation pulses. This circuit is meant to be connected to pixel-like detectors. Imaging can be obtained by counting the number of hits in each pixel during a user-controlled exposure time. Each channel of the circuit features an analog and a digital part. In the former one, a charge preamplifier is followed by a CR—RC shaper with an output buffer and a threshold discriminator. In the digital part, a 16-bit counter is present together with some control logic. The readout of the counters is done serially on a common tri-state output. Daisy-chaining is possible. A 4-channel prototype has been built. This prototype has been optimised for use in the digital radiography Syrmep experiment at the Elettra synchrotron machine in Trieste (Italy): its main design parameters are: shaping time of about 850 ns, gain of 190 mV/fC and ENC (e − rms)=60 + 17 C (pF). The counting rate per channel, limited by the analog part, can be as high as about 200 kHz. Characterisation of the circuit and first tests with silicon microstrip detectors are presented. They show the circuit works according to design specification and can be used for imaging applications.

Design and Characteristics of a Multichannel Front-End ASIC Using Current-Mode CSA for Small-Animal PET Imaging

Abstract: This paper presents the design and characteristics of a front-end readout application-specific integrated circuit (ASIC) dedicated to a multichannel-plate photodetector coupled to LYSO scintillating crystals. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. Both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. A current-mode charge-sensitive amplifier is proposed for this application. This paper presents performance characteristics of a 10-channel prototype chip designed and fabricated in a 0.35-μm complementary metal-oxide semiconductor process. The main results of simulations and measurements are presented and discussed. The gain of the chip is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The signal-to-noise ratio is 39 dB and the rms noise is 300 μV/√(Hz). The nonlinearity is less than 3% and the crosstalk is about 0.2%. The power dissipation is less than 15 mW/channel. This prototype will be extended to a 64-channel circuit with integrated time-to-digital converter and analog-to-digital converter together for a high-sensitive small-animal positron emission tomography imaging system.

Castor 1.0, a VLSI analog-digital circuit for pixel imaging applications

Abstract: We present a VLSI CMOS-mixed analog-digital circuit for high-rate pixel X-ray imaging applications. It consists of 32 channels at 80 μm pitch. The total die size is 3.7×14 mm 2 . Each channel features: a low-noise charge preamplifier, a CR-RC shaper, a buffer, a threshold discriminator and a 16-bit binary counter. The readout is done serially on a tri-state buffer. The main parameters of the analog part are: shaping time of 850 ns at 5 pF input capacitance, gain of 180 mV/fC, ENC( e − rms) = 60 + 17 C d (pF) and a power consumption of 3.8 mW/channel. The counting rate is limited by the analog part to around 100 kHz/channel for 1 fC charge pulses. Due to the parallelism of the circuit, photon rate in the order of 1 GHz/cm 2 can be measured for a pixel size of the order of 200 × 200 μ m 2 . The parameters of the circuit were optimised for the Syrmep experiment, an R&D project in digital mammography. The circuit was produced in 1.2 μm CMOS technology by AMS (Austria). Characterisation of the circuit, as well as first-imaging results of the circuit connected to microstrips or pixel detectors are presented. They show the circuit works according to specification and can be used for imaging applications.

Physics and Detectors at CLIC: CLIC Conceptual Design Report

Abstract: This report describes the physics potential and experiments at a future multi- TeV e+e collider based on the Compact Linear Collider (CLIC) technology The physics scenarios considered include precision measurements of known quantities as well as the discovery potential of physics beyond the Standard Model The report describes the detector performance required at CLIC, taking into account the interaction point environment and especially beaminduced backgrounds Two detector concepts, designed around highly granular calorimeters and based on concepts studied for the International Linear Collider (ILC), are described and used to study the physics reach and potential of such a collider Detector subsystems and the principal engineering challenges are illustrated The overall performance of these CLIC detector concepts is demonstrated by studies of the performance of individual subdetector systems as well as complete simulation studies of six benchmark physics processes These full detector simulation and reconstruction studies include beaminduced backgrounds and physics background processes After optimisation of the detector concepts and adopting the reconstruction algorithms the results show very efficient background rejection and clearly demonstrate the physics potential at CLIC in terms of precision mass and cross section measurements Finally, an overview of future plans of the CLIC detector and physics study is given and a list of key detector R&D topics needed for detectors at CLIC is presented

Direct Electron Detectors.

Abstract: Direct electron detectors have played a key role in the recent increase in the power of single-particle electron cryomicroscopy (cryoEM). In this chapter, we summarize the background to these recent developments, give a practical guide to their optimal use, and discuss future directions.