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Author

Youbo Lin

Other affiliations: GlobalFoundries
Bio: Youbo Lin is an academic researcher from Harvard University. The author has contributed to research in topics: Chemical vapor deposition & Copper. The author has an hindex of 12, co-authored 14 publications receiving 654 citations. Previous affiliations of Youbo Lin include GlobalFoundries.

Papers
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Journal ArticleDOI
Yeung Billy Au1, Youbo Lin1, Hoon Kim1, Eugene S. Beh1, Yiqun Liu1, Roy G. Gordon1 
TL;DR: In this paper, a self-aligned chemical vapor deposition (CVD) Mn capping process is introduced to strengthen the interface between Cu and dielectric insulators without increasing the resistivity of Cu.
Abstract: In modern Cu interconnections in microelectronics, weak adhesion between the chemical-mechanical polished copper surface and the dielectric capping material can lead to rapid electromigration of Cu and early failure of the wiring. A self-aligned chemical vapor deposition (CVD) Mn capping process is introduced to strengthen the interface between Cu and dielectric insulators without increasing the resistivity of Cu. In this CVD process, a vapor mixture of Mn precursor and molecular hydrogen deposits Mn selectively on copper and not at all on the adjacent, previously deactivated surfaces of insulators. Deactivation of the insulator surfaces is accomplished by exposure to vapors containing reactive alkylsilyl groups. The presence of Mn at the Cu/insulator interface greatly increases the strength of the bonding between Cu and the insulator. The debonding energy increases approximately linearly with the amount of Mn at the interface, up to values so large that the interface could not be broken apart. This Mn-enhanced binding strength of Cu to insulators is observed for all insulators tested, including plasma-enhanced chemical vapor deposited Si 3 N 4 , SiCNOH, SiO 2 , and low-k SiCOH, as well as thermal SiO 2 and atomic-layer-deposited SiO 2 . This selective CVD Mn capping process should increase the lifetime of advanced copper interconnections.

104 citations

Journal ArticleDOI
TL;DR: In this paper, an adhesion-enhancing layer of sputtered tantalum metal is placed between the TaNx and the copper, which serves as the seed for electroplating of the bulk of the copper interconnections.
Abstract: Microprocessor technology now relies on copper for most of its electrical interconnections. Because of the high diffusivity of copper, diffusion barriers are needed to keep the copper from diffusing into the insulators and silicon semiconductors, in which copper would degrade or destroy performance. Sputtered tantalum nitride sTaNxd generally serves as the copper diffusion barrier. Another problem with copper is that it has weak adhesion to most other materials, including TaNx. Thus an adhesion-enhancing layer of sputtered tantalum metal ~Ta! is placed between the TaNx and the copper. A thin layer of sputtered copper serves as the seed for electroplating of the bulk of the copper interconnections. The sputtering technology for depositing seed layers of copper is experiencing difficulty in placing the copper within increasingly narrow trenches and vias. 1 If the copper seed layer has any gaps in its continuity, then a void may remain after the electrochemical filling of the conductor. Such a void may cause high resistance or even an open circuit. This problem arises because of the limited step coverage that can be achieved using sputtering. Atomic layer deposition ~ALD! 2 is able to deposit films that are

101 citations

Journal ArticleDOI
TL;DR: In this paper, a process for the void-free filling of sub-100 nm trenches with copper or copper-manganese alloy by chemical vapor deposition (CVD) is presented.
Abstract: We present a process for the void-free filling of sub-100 nm trenches with copper or copper-manganese alloy by chemical vapor deposition (CVD). Conformally deposited manganese nitride serves as an underlayer that initially chemisorbs iodine. CVD of copper or copper-manganese alloy releases the adsorbed iodine atoms from the surface of the manganese nitride, allowing iodine to act as a surfactant catalyst floating on the surface of the growing copper layer. The iodine increases the growth rate of the copper and manganese by an order of magnitude. As the iodine concentrates near the narrowing bottoms of features, void-free, bottom-up filling of CVD of pure copper or copper-manganese alloy is achieved in trenches narrower than 30 nm with aspect ratios up to at least 5:1. The manganese nitride films also show barrier properties against copper diffusion and enhance adhesion between copper and dielectric insulators. During post-deposition annealing, manganese in the alloy diffuses out from copper through the grain boundaries and forms a self-aligned layer that further improves adhesion and barrier properties at the copper/insulator interface. This process provides nanoscale interconnects for microelectronic devices with higher speeds and longer lifetimes.

95 citations

Journal ArticleDOI
TL;DR: In this article, a polycrystalline ruthenium with high purity was grown on tungsten nitride and achieved a growth rate of 1.5 /cycle at a substrate temperature of 300 iC.
Abstract: -di- tert-butylacetamidinato "ruthenium !II" dicarbonyl. The CVD Þlms were grownwithout any coreactant, while the ALD Þlms used ammonia as a coreactant. The Þ lms are Þne-grained polycrystalline rutheniumwith high purity !! 0.2% impurities ".R u grew as a continuous, electrically conductive, pinhole-free Þlm on tungsten nitride !WN "Þlms even for Þlms as thin as 2 nm. The resistivities of the Þlms match those of pure sputtered ruthenium of the same thickness.Roughness is ! 2% of the Þlm thickness. The Þ lms are very conformal, with 80% step coverage over holes with high aspect ratios!40:1 ". T his thermal process does not use any oxidant or plasma as a second reagent, thereby avoiding damage to sensitivesubstrates. The ALD growth rate can reach 1.5  /cycle at a substrate temperature of 300 iC .© 2007 The Electrochemical Society . #DOI: 10.1 149/1.2789294 $ All rights reserved.Manuscript submitted May 9, 2007; revised manuscript received August 9, 2007. A vailable electronically October 11, 2007.

84 citations

Journal ArticleDOI
TL;DR: In this paper, the structure and mechanical behavior of organosilicate glass (OSG) coatings have been analyzed as a function of composition and UV irradiation time, showing that a decrease in the OSG carbon content results in more networking bonds and increased connectivity.

56 citations


Cited by
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TL;DR: Puurunen et al. as discussed by the authors summarized the two-reactant ALD processes to grow inorganic materials developed to-date, updating the information of an earlier review on ALD.
Abstract: Atomic layer deposition (ALD) is gaining attention as a thin film deposition method, uniquely suitable for depositing uniform and conformal films on complex three-dimensional topographies. The deposition of a film of a given material by ALD relies on the successive, separated, and self-terminating gas–solid reactions of typically two gaseous reactants. Hundreds of ALD chemistries have been found for depositing a variety of materials during the past decades, mostly for inorganic materials but lately also for organic and inorganic–organic hybrid compounds. One factor that often dictates the properties of ALD films in actual applications is the crystallinity of the grown film: Is the material amorphous or, if it is crystalline, which phase(s) is (are) present. In this thematic review, we first describe the basics of ALD, summarize the two-reactant ALD processes to grow inorganic materials developed to-date, updating the information of an earlier review on ALD [R. L. Puurunen, J. Appl. Phys. 97, 121301 (2005)], and give an overview of the status of processing ternary compounds by ALD. We then proceed to analyze the published experimental data for information on the crystallinity and phase of inorganic materials deposited by ALD from different reactants at different temperatures. The data are collected for films in their as-deposited state and tabulated for easy reference. Case studies are presented to illustrate the effect of different process parameters on crystallinity for representative materials: aluminium oxide, zirconium oxide, zinc oxide, titanium nitride, zinc zulfide, and ruthenium. Finally, we discuss the general trends in the development of film crystallinity as function of ALD process parameters. The authors hope that this review will help newcomers to ALD to familiarize themselves with the complex world of crystalline ALD films and, at the same time, serve for the expert as a handbook-type reference source on ALD processes and film crystallinity.

1,160 citations

01 Jan 1999
TL;DR: Damascene copper electroplating for on-chip interconnections, a process that was conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition as discussed by the authors.
Abstract: Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

1,006 citations

Journal ArticleDOI
TL;DR: Willi Volksen joined the IBM Research Division at the IBM Almaden Research Center in San Jose, CA, where he is an active research staff member in the Advanced Materials Group of the Science and Technology function.
Abstract: Modern computer microprocessor chips are marvels of engineering complexity. For the current 45 nm technology node, there may be nearly a billion transistors on a chip barely 1 cm2 and more than 10 000 m of wiring connecting and powering these devices distributed over 9-10 wiring levels. This represents quite an advance from the first INTEL 4004B microprocessor chip introduced in 1971 with 10 μm minimum dimensions and 2 300 transistors on the chip! It has been disclosed that advanced microprocessor chips at the 32 nm node will have more than 2 billion transistors.1 For instance, Figure 1 shows a sectional 3D image of a 90 nm IBM microprocessor, containing several hundred million integrated devices and 10 levels of interconnect wiring, designated as the back-end-of-the-line (BEOL). Since the invention of microprocessors, the number of active devices on a chip has been exponentially increasing, approximately doubling every two years. This trend was first described in 1965 by Gordon Moore,2 although the original discussion suggested doubling the number of devices every year, and the phenomenon became popularly known as Moore’s Law. This progress has proven remarkably resilient and has persisted for more than 50 years. The enabler that has permitted these advances is known as scaling, that is, the reduction of minimum device dimensions by lithographic advances (photoresists, tooling, and process integration optimization) by ∼30% for each device generation.3 It allowed more active devices to be incorporated in a given area and improved the operating characteristics of the individual transistors. It should be emphasized that the earlier improvements in chip performance were achieved with very few changes in the materials used in the construction of the chips themselves. The increase of performance with scaling * Corresponding author. E-mail: gdubois@us.ibm.com. † IBM Almaden Research Center. ‡ Stanford University. Willi Volksen received his B.S. in Chemistry (magna cum laude) from New Mexico Institute of Mining and Technology in 1972 and his Ph.D. in Chemistry/Polymer Science from the University of Massachusetts, Lowell, in 1975. He then joined the research group of Prof. Harry Gray/Dr. Alan Rembaum at the California Institute of Technology as a postdoctoral fellow and upon completion of the one-year appointment joined Dr. Rembaum at the Jet Propulsion Laboratory as a Senior Chemist in 1976. In 1977 Dr. Volksen joined the IBM Research Division at the IBM Almaden Research Center in San Jose, CA, where he is an active research staff member in the Advanced Materials Group of the Science and Technology function.

714 citations

Journal ArticleDOI
TL;DR: Details of recent research progresses that have been recorded in the context of breakthrough and challenges in development of membrane materials are presented.

318 citations

Journal ArticleDOI
TL;DR: In this paper, a review of thermal ALD of noble metals and their oxides is presented, where reaction mechanisms in various types of processes are discussed and issues in nucleation are addressed.
Abstract: Atomic layer deposition (ALD) is an attractive method to deposit thin films for advanced technological applications such as microelectronics and nanotechnology. One material group in ALD that has matured in 10 years and proven to be of wide technological importance is noble metals. In this paper, thermal ALD of noble metals and their oxides is reviewed. Noble metal films are mostly grown using O2 as the nonmetal precursor in a combustion-type chemistry. Alternatively, lower growth temperatures can be reached via noble metal oxide growth with consecutive reactions with ozone and H2. The use of true reducing chemistry (i.e., H2) is typical only for ALD of palladium at low temperatures. On the other hand, ALD of noble metal oxides has been limited with reactants such as ozone and O2 gas. In this review, reaction mechanisms in various types of processes are discussed and issues in nucleation are addressed. Deposition temperatures, film growth rates, and purities as well as evaporation temperatures used for no...

282 citations