This paper proposes a mm-wave frequency generation technique that improves its phase noise (PN) performance and power efficiency. The main idea is that a fundamental 20 GHz signal and its sufficiently strong third harmonic at 60 GHz are generated simultaneously in a single oscillator. The desired 60 GHz local oscillator (LO) signal is delivered to the output, whereas the 20 GHz signal can be fed back for phase detection in a phase-locked loop. Third-harmonic boosting and extraction techniques are proposed and applied to the frequency generator. A prototype of the proposed frequency generator is implemented in digital 40 nm CMOS. It exhibits a PN of $-100\;\text{dBc/Hz}$ at 1 MHz offset from 57.8 GHz and provides 25% frequency tuning range (TR). The achieved figure-of-merit (FoM) is between 179 and 182 dBc/Hz.

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A 60 GHz Frequency Generator Based on a 20 GHz Oscillator and an Implicit Multiplier

A frequency-tracking technique is proposed to enhance the locking range of millimeter-wave (mmW) injection-locked frequency dividers (ILFDs). An improved model is introduced for direct-injection ILFDs, based on which both the phase and gain conditions are analyzed and discussed. Moreover, a method of admittance locus is applied to obtain the design intuition for optimization and to predict the locking range accurately. Finally, with the proposed model and design methodology, a frequency-tracking ILFD is designed and fabricated in a 65-nm CMOS process, which measures a locking range of 39.2% from 53.4 to 79.4 GHz while consuming 2.9 mW from an 0.8-V power supply, which corresponds to an FoM of 8.97 GHz/mW.

Analysis and Design of a 2.9-mW 53.4–79.4-GHz Frequency-Tracking Injection-Locked Frequency Divider in 65-nm CMOS

A cascoded frequency divider (FD) with division number of 4 and ultra-wide locking range is presented in this paper. The proposed FD consists of a divide-by-2 (D2) injection-locked frequency divider (ILFD) core and a D2 source-injection current mode logic (SICML) divider. After the cascoded integration of ILFD and SICML, the removal of transconductance and buffer stages can lower the dc power consumption and widen the locking range. The proposed FD is implemented in 0.13-μm CMOS technology and has a 77.3% frequency locking range from 13.5 to 30.5 GHz at injection power of 0 dBm while consuming 7.3-mW dc power. Compared to the previously reported ILFDs, the proposed circuit achieves the widest locking range without employing extra tuning mechanism.

Design and Analysis of a 77.3% Locking-Range Divide-by-4 Frequency Divider

This letter presents a V-band direct injection-locked frequency divider (ILFD) using forward body bias technology. The divider is implemented in a 0.13 μm CMOS process. The measurements show that the free-running frequency of the divider is 28.67 GHz, the total locking range is 16.2% at 58 GHz with 3.93 mW from a low supply voltage of 0.7 V, and the measured phase noise of the divider is -123.5 dBc/Hz at 500 KHz offset. The output power of the divider is higher than -9 dBm from 54 to 61 GHz, and a good figure of merit is achieved.

A V-Band CMOS Direct Injection-Locked Frequency Divider Using Forward Body Bias Technology

In this paper, a novel circuit topology of a CMOS divide-by-4 direct injection-locked frequency divider is presented for millimeter-wave applications. To enhance the locking range for circuit operations with a division ratio of 4, a series peaking technique is introduced in the proposed divider structure such that improved input injection efficiency can be achieved. Using a standard 0.18-μm CMOS process, a V -band frequency divider is fabricated for demonstration. Operated at a supply voltage of 1.8 V, the divider core consumes a dc power of 12.6 mW. At an incident power of 0 dBm, the fabricated circuit exhibits an input locking range of 2.44 GHz in the vicinity of 60 GHz. The measured output power and locked phase noise at 1-MHz offset are -7 dBm and -133 dBc/Hz, respectively.

A $V$ -Band Divide-by-4 Direct Injection-Locked Frequency Divider in 0.18- $\mu{\hbox {m}}$ CMOS

A 50-to-62 GHz injection-locked frequency divider (ILFD) with transformer feedback technique is designed in 0.13-mum CMOS technology for wide locking range. The measurement results show that the free-running frequency is 55.3 GHz and the total locking range is 12 GHz (>20%) at the input power level of 0 dBm while consuming 10.8 mW from a 0.9 V power supply. The phase noise of the divider is -124.93 dBc/Hz at 1 MHz offset from the carrier. This wide locking range ILFD is suitable for integration into a phase-lock-loop (PLL) system because of its small size and no need of extra control signal.

Yu-Hang Wong

Papers

A 50-to-62GHz wide-locking-range CMOS injection-locked frequency divider with transformer feedback