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Yuan-Heng Tseng

Bio: Yuan-Heng Tseng is an academic researcher from National Tsing Hua University. The author has contributed to research in topics: Noise (electronics) & Signal. The author has an hindex of 3, co-authored 3 publications receiving 150 citations.

Papers
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Journal ArticleDOI
TL;DR: A new type of true random number generator, based on the random telegraph noise of a contact-resistive random access memory device, is proposed in this letter, demonstrating substantial saving in the circuit area.
Abstract: A new type of true random number generator, based on the random telegraph noise of a contact-resistive random access memory device, is proposed in this letter. The random-number generator consists of only a simple bias circuit plus a comparator, leading to small circuit area and low power consumption. By realizing this generator by the 65-nm complementary metal-oxide-semiconductor logic process, the occupied area can be as low as 45 μm2, demonstrating substantial saving in the circuit area.

132 citations

Journal ArticleDOI
TL;DR: In this article, a CMOS-process-compatible programmable contact antifuse (PCAF) cell is presented for advance programmable logic applications, which adapts an oxide layer formed by the etched resist-protection oxide layer under a properly designed contact region, which results in a highly scalable one-time programmable solution for advance logic circuits.
Abstract: A new CMOS-process-compatible programmable contact antifuse (PCAF) cell is presented in this letter for advance programmable logic applications. This innovative PCAF cell adapts an oxide layer formed by the etched resist-protection oxide layer under a properly designed contact region, which results in a highly scalable one-time-programmable solution for advance logic circuits. A subcircuit model describing the - characteristics of the antifuse cell before and after program is developed to facilitate the future PCAF memory macro design.

23 citations

Journal ArticleDOI
TL;DR: In this article, a novel contact resistive random access memory (CRRAM) device based on a temperature sensor is proposed and investigated by establishing the relationship between CRRAM's random telegraph noise (RTN) signal and temperature, a new temperature sensing scheme is demonstrated for the first time.
Abstract: A novel contact resistive random access memory (CRRAM) device based a temperature sensor is proposed and investigated in this letter. By establishing the relationship between CRRAM's random telegraph noise (RTN) signal and temperature, a new temperature sensing scheme is demonstrated for the first time. With a simple comparator circuit, a digital output temperature sensor is successfully implemented based on the temperature-dependent RTN signal. The new sensing scheme is very suitable to low-power low-speed sensor modules.

11 citations


Cited by
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Journal ArticleDOI
01 Jun 2018
TL;DR: This Review Article examines the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, theirresistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation.
Abstract: Modern computers are based on the von Neumann architecture in which computation and storage are physically separated: data are fetched from the memory unit, shuttled to the processing unit (where computation takes place) and then shuttled back to the memory unit to be stored. The rate at which data can be transferred between the processing unit and the memory unit represents a fundamental limitation of modern computers, known as the memory wall. In-memory computing is an approach that attempts to address this issue by designing systems that compute within the memory, thus eliminating the energy-intensive and time-consuming data movement that plagues current designs. Here we review the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, their resistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation. We examine the different digital, analogue, and stochastic computing schemes that have been proposed, and explore the microscopic physical mechanisms involved. Finally, we discuss the challenges in-memory computing faces, including the required scaling characteristics, in delivering next-generation computing. This Review Article examines the development of in-memory computing using resistive switching devices.

1,193 citations

Journal ArticleDOI
TL;DR: This Review surveys the four physical mechanisms that lead to resistive switching materials enable novel, in-memory information processing, which may resolve the von Neumann bottleneck and examines the device requirements for systems based on RSMs.
Abstract: The rapid increase in information in the big-data era calls for changes to information-processing paradigms, which, in turn, demand new circuit-building blocks to overcome the decreasing cost-effectiveness of transistor scaling and the intrinsic inefficiency of using transistors in non-von Neumann computing architectures. Accordingly, resistive switching materials (RSMs) based on different physical principles have emerged for memories that could enable energy-efficient and area-efficient in-memory computing. In this Review, we survey the four physical mechanisms that lead to such resistive switching: redox reactions, phase transitions, spin-polarized tunnelling and ferroelectric polarization. We discuss how these mechanisms equip RSMs with desirable properties for representation capability, switching speed and energy, reliability and device density. These properties are the key enablers of processing-in-memory platforms, with applications ranging from neuromorphic computing and general-purpose memcomputing to cybersecurity. Finally, we examine the device requirements for such systems based on RSMs and provide suggestions to address challenges in materials engineering, device optimization, system integration and algorithm design. Resistive switching materials enable novel, in-memory information processing, which may resolve the von Neumann bottleneck. This Review focuses on how the switching mechanisms and the resultant electrical properties lead to various computing applications.

564 citations

Journal ArticleDOI
An Chen1
TL;DR: High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures, and Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage.
Abstract: This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power ( e.g. , mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g. , neuromorphic computing, hardware security, etc . In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

434 citations

Journal ArticleDOI
TL;DR: A novel true random number generator utilizing the stochastic delay time of threshold switching in a Ag:SiO2 diffusive memristor, which exhibits evident advantages in scalability, circuit complexity, and power consumption.
Abstract: The intrinsic variability of switching behavior in memristors has been a major obstacle to their adoption as the next generation of universal memory. On the other hand, this natural stochasticity can be valuable for hardware security applications. Here we propose and demonstrate a novel true random number generator utilizing the stochastic delay time of threshold switching in a Ag:SiO2 diffusive memristor, which exhibits evident advantages in scalability, circuit complexity, and power consumption. The random bits generated by the diffusive memristor true random number generator pass all 15 NIST randomness tests without any post-processing, a first for memristive-switching true random number generators. Based on nanoparticle dynamic simulation and analytical estimates, we attribute the stochasticity in delay time to the probabilistic process by which Ag particles detach from a Ag reservoir. This work paves the way for memristors in hardware security applications for the era of the Internet of Things. Memristors can switch between high and low electrical-resistance states, but the switching behaviour can be unpredictable. Here, the authors harness this unpredictability to develop a memristor-based true random number generator that uses the stochastic delay time of threshold switching

277 citations