An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

This review paper explores considerations for ultimate CMOS transistor scaling Transistor architectures such as extremely thin silicon-on-insulator and FinFET (and related architectures such as TriGate, Omega-FET, Pi-Gate), as well as nanowire device architectures, are compared and contrasted Key technology challenges (such as advanced gate stacks, mobility, resistance, and capacitance) shared by all of the architectures will be discussed in relation to recent research results

Considerations for Ultimate CMOS Scaling

Hybrid silicon lasers based on bonded III–V layers on silicon are currently the best contenders for on-chip lasers for silicon photonics. On-chip silicon light sources are highly desired for use as electrical-to-optical converters in silicon-based photonics. Zhiping Zhou and Bing Yin of Peking University in China and Jurgen Michel of Massachusetts Institute of Technology assess the three main contenders for such light sources: erbium-based light sources, germanium-on-silicon lasers and III-V-based silicon lasers. They consider operating wavelength, pumping conditions, power consumption, thermal stability and fabrication process. The scientists regard the power efficiencies of electrically pumped erbium-based lasers as being too low and the threshold currents of germanium lasers as being too high. They conclude that III–V quantum dot lasers monolithically grown on silicon show the most promise for realizing on-chip lasers.

/pdf/on-chip-light-sources-for-silicon-photonics-ky23qv18q4.pdf

On-chip light sources for silicon photonics

Growing a group III–V quantum dot laser directly on a group IV substrate could provide silicon photonics with a convenient new form of laser source for use in optoelectronic circuitry.

Long-wavelength InAs/GaAs quantum-dot laser diode monolithically grown on Ge substrate

Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication

Germanium-on-insulator (GeOI) substrates—A novel engineered substrate for future high performance devices

We have studied the etching of silicon, SiGe and germanium layers with gaseous HCl in reduced pressure-chemical vapour deposition (RP-CVD). We have observed the occurrence of two etch regimes depending on the etching temperature. The first regime takes place at high temperatures and is characterized by low activation energies (~7 kcal mol−1), this whatever the germanium content of the etched layer. The other regime occurs at low temperatures and has associated high activation energies (which strongly depend upon the germanium concentration of the etched layer: 86 kcal mol−1 for pure Si versus 28 kcal mol−1 for pure Ge). Modifying the HCl partial pressure has different effects depending on the regime. In the high temperature regime, increasing the HCl partial pressure will almost quadratically increase the etch rate (ER ∝ PHCl1.76), this both for Si and Si0.67Ge0.33. Meanwhile, the dependence is sub-linear in the low temperature regime (Si ER ∝ PHCl0.53 and Si0.67Ge0.33 ER ∝ PHCl0.82). The temperature where the regime shifts from one to the other decreases when the Ge concentration increases. To illustrate the added value of the chemical vapour etching, we have demonstrated two possible applications. The first one is the realization of SiGe thin strain relaxed buffers (TSRBs) in the active areas of shallow trench isolation (STI) patterned wafers after etching away the silicon with HCl. We have observed the occurrence of some etching loading effects when moving from a blanket to a patterned wafer. The SiGe TSRBs exhibit some good structural properties (rms roughness of 0.12 nm, no defects observed in cross-sectional transmission electron microscopy). However, they are not fully relaxed and facets are present at the STI/epitaxial stack boundary, signifying they are still not mature enough to be integrated in a metal oxide semiconductor technology. Another possible application is to decorate through some in situ HCl etching the dislocations threading through SiGe relaxed thick layers, with some significant advantages over commonly used wet etching solutions such as the Secco and the Schimmel ones.

https://iopscience.iop.org/article/10.1088/0268-1242/20/2/004/pdf

Chemical vapour etching of Si, SiGe and Ge with HCl; applications to the formation of thin relaxed SiGe buffers and to the revelation of threading dislocations

We prepared Er silicide films on (111) Si by (1) deposition of Er and contact reaction at 380 °C or (2) vacuum codeposition of Er and Si maintaining the flux ratio close to 1:2. Subsequent annealing at temperatures up to 900 °C yielded monocrystalline, continuous layers, whose properties were examined by means of low‐energy electron diffraction, Auger spectroscopy (in situ) and (ex situ), x‐ray and high‐energy electron diffraction, and Rutherford backscattering. Method 2 was shown to give better results. The films had a hexagonal AlB2 structure with Si deficiency up to 20%, which is consistent with formerly published results on Si vacancy formation. We showed that the film structure had an additional periodicity of 15 A along the 〈110〉 orientations of Si and of 6 A along the 〈112〉 orientations of Si. We demonstrated a feasibility of Si reepitaxy on Er silicide deposited on (111) Si, thus fabricating a novel semiconductor/metal/semiconductor epitaxial heterostructure.

Fabrication and structure of epitaxial Er silicide films on (111) Si

The invention concerns a method which consists in: (a) stabilization of the monocrystalline silicon substrate temperature at a first predetermined temperature T 1 of 400 to 500° C.; (b) chemical vapour deposition (CVD) of germanium at said first predetermined temperature T 1 until a base germanium layer is formed on the substrate, with a predetermined thickness less than the desired final thickness; (c) increasing the CVD temperature from said first predetermined temperature T 1 up to a second predetermined temperature T 2 of 750 to 850° C.; and (d) carrying on with CVD of germanium at said second predetermined temperature T 2 until the desired final thickness for the monocrystalline germanium final layer is obtained. The invention is useful for making semiconductor devices.

Process for obtaining a layer of single-crystal germanium on a substrate of single-crystal silicon, and products obtained

We present the first internal photoemission response of a metal‐Si‐metal heterostructure. Using the Pt/Si/ErSi1.7 system, we show that the photoresponse of this new device can be strongly modified when a bias of a few hundred mV is applied between the two metallic electrodes: the cutoff wavelength is shifted from 1.4 μm to above 5 μm, and the quantum efficiency is increased up to 5% at 1.2 μm wavelength when a positive bias is applied to the front Pt electrode. These dramatic changes are attributed to a modulation of the effective potential barrier experienced by the photoexcited carriers when crossing the Si film.

Yves Campidelli

Papers

Germanium-on-insulator (GeOI) substrates—A novel engineered substrate for future high performance devices

Chemical vapour etching of Si, SiGe and Ge with HCl; applications to the formation of thin relaxed SiGe buffers and to the revelation of threading dislocations

Fabrication and structure of epitaxial Er silicide films on (111) Si

Process for obtaining a layer of single-crystal germanium on a substrate of single-crystal silicon, and products obtained

Infrared response of Pt/Si/ErSi1.7 heterostructure: Tunable internal photoemission sensor