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Zbigniew Czaja

Bio: Zbigniew Czaja is an academic researcher from Gdańsk University of Technology. The author has contributed to research in topics: Microcontroller & Fault detection and isolation. The author has an hindex of 10, co-authored 38 publications receiving 279 citations.

Papers
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Journal ArticleDOI
TL;DR: Two new methods of fault localization and identification in linear electronic circuits, based on a bilinear transformation in multidimensional spaces are presented, with the possibility of creating p/sub i/p/sub j/-surfaces or hypersurfaces, which can be used for double-fault diagnosis or two-parameter identification measurements.
Abstract: Presents two new methods of fault localization and identification in linear electronic circuits, based on a bilinear transformation in multidimensional spaces. The conventional bilinear transformation maps changes of circuit component parameters p/sub i/ into a family of p/sub i/-loci on the complex plane. The loci can be used for fault diagnosis as well as parametrical identification measurements of objects modeled by electrical circuits. The bilinear transformation method proposed by Martens and Dyck [1972] was based on the family of p/sub i/-loci on a plane. It was difficult to implement this method (called here the two-dimensional method) in practice because frequently p/sub i/-loci are situated too close to each other or superimpose one on another. The authors propose a new approach based on transferring p/sub i/-loci from a plane to three-dimensional (3-D) or four-dimensional (4-D) spaces. Distances between p/sub i/-loci in space are greater. This fact leads to better fault resolution and robustness against the influence of component tolerances and measurement errors. This approach also gives the possibility of creating p/sub i/p/sub j/-surfaces or hypersurfaces, which can be used for double-fault diagnosis or two-parameter identification measurements. The 3-D and 4-D algorithms of single- and double-fault diagnosis, and experimental verification of the 4-D method and the implementation of the 4-D method in a neural network are described.

40 citations

Journal ArticleDOI
TL;DR: New methods of fault localisation and identification in linear electronic circuits (two-port or multi-port type) based on bilinear transformations in multi-dimensional spaces are presented, with particular consideration of the 3D, 4D and 6D methods.

40 citations

Journal ArticleDOI
TL;DR: In this article, a novel time domain method and its implementation in a simple smart impedance sensor controlled by an 8-bit microcontroller is presented, which is based on stimulation of a voltage divider consisting of a resistor working as a current-to-voltage converter and the impedance sensor by a single squarevoltage pulse.
Abstract: A novel time domain method and its implementation in a simple smart impedance sensor controlled by an 8-bit microcontroller is presented in the paper. The method is based on stimulation of a voltage divider consisting of a resistor working as a current-to-voltage converter and the impedance sensor by a single square-voltage pulse with a duration time T directly generated by the output of the microcontroller and on sampling the resulting voltage on the sensor at three different selected moments T/8, T/2 and 7T/8 by the internal ADC of the microcontroller. The sensor is modeled by a three-components circuit. The duration time T is determined by the first timer and the ADC is triggered by the second timer of the microcontroller. The measurement procedure takes less than 1 ms and the determination of model component values is based on basic calculus. Thanks to this, smart sensors basing on this solution are energy-saving, they can work on the same batteries by a few years, and low cost on the level tens euros. Hence, they can be used in wireless sensor networks, especially basing on the ZigBee protocol. The results of the simulation investigation and the experimental verification of the method are included in this paper.

30 citations

Journal ArticleDOI
TL;DR: In this article, a new class of K-D fault diagnosis methods of analog parts in embedded mixed-signal micro systems based on microcontrollers is presented, which consist of three stages: a pre-testing stage of a fault dictionary creation, a measurement stage based on the measurement of voltage samples of the time response on a stimulating square impulse of the analog part realized by internal resources of the microcontroller and a fault detection and localization stage performed by the micro controller.

26 citations

Journal ArticleDOI
TL;DR: In this paper, a fault detection and localization method for analog parts with tolerances of non-faulty elements in embedded mixed-signal systems controlled by microcontrollers is presented.

25 citations


Cited by
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Journal ArticleDOI
TL;DR: This critical review discusses the research challenges that are still available in the existing techniques and the way to extend the current research is also examined.
Abstract: Due to the wide range of applications of electronic circuits in the recent years, the fault diagnosis in electronic circuits is a foremost problem. The main purpose of the fault diagnosis technique is isolating the faults present in the electronic circuits and also, detecting the fault which affects the safety and performance of the system. For various real-time applications of fault diagnosis, literature presents several techniques for detecting the faults in electronic circuits. In this paper, reviews on the research based on the fault diagnosis techniques which are all gained much attention are comprehended. Accordingly, 114 research papers related to the fault diagnosis are reviewed and analyzed based on the various objectives. In this review, we present the taxonomy of the fault detection in analog circuits and discuss the state of the art algorithms with various advantages and major drawbacks. The comprehensive analysis is carried out on finding the coverage of the publishers, faults, circuits, methods, simulation tools, and metrics. This critical review finally discusses the research challenges that are still available in the existing techniques and the way to extend the current research is also examined.

73 citations

Journal ArticleDOI
TL;DR: Approaches to the tolerance-handling method in soft-fault diagnosis and a novel test-point selection approach for the fault dictionary technique are proposed.
Abstract: Soft-fault diagnosis and tolerance are two challenging problems in analog-circuit fault diagnosis. Although many analog faults can be diagnosed theoretically, they cannot be accurately diagnosed due to the influence of component tolerance. This paper proposes approaches to the tolerance-handling method in soft-fault diagnosis. First, the slope fault model and its theoretical proof are presented. In linear analog circuits, the voltage equation between two nodes is linear and can be expressed by a point-slope-form equation in which the point is determined by the nominal voltage values on the two selected nodes, and the slope, which is invariant, can be used as the fault model, which is applicable to both hard (open or short) and soft (parametric) faults. Then, the parameter tolerance is taken into consideration. The point-slope-form equation is governed by a point and a slope value. The tolerance influences the fault diagnosis by shifting both the point and the nominal slope value. These influences can be mitigated in two ways: 1) The point is measured when an actual circuit is under steady state and free of fault, and 2) the maximum slope deviation is readily obtained by using optimization theory if the equation governing the voltage between two nodes is available; otherwise, a threshold proportion coefficient is used to calculate the maximum deviation. Based on these methods, a novel test-point selection approach for the fault dictionary technique is proposed. The effectiveness of the proposed approaches is verified by both simulated and experimental results.

62 citations

Journal ArticleDOI
TL;DR: The method aims to identify a subset of defects that are likely to have occurred and suggests to give them priority in a classical failure analysis and is demonstrated on an industrial large-scale case study.
Abstract: We present a method for diagnosing local spot defects in analog circuits. The method aims to identify a subset of defects that are likely to have occurred and suggests to give them priority in a classical failure analysis. For this purpose, the method relies on a combination of multiclass classifiers that are trained using data from fault simulation. The method is demonstrated on an industrial large-scale case study. The device under consideration is a controller area network transceiver used in automobile systems. This device demands high-quality control due to the reliability requirements of the application wherein it is deployed. The diagnosis problem is discussed by taking into consideration the realities of this case study.

52 citations

Journal ArticleDOI
TL;DR: The proposed approach can detect and identify faulty components in the analog circuits by analyzing their time responses and diagnose single and multiple faults effectively in classifying faulty components of example circuits to improve the accuracy and efficiency of fault diagnosis with a highly correct classification rate.

49 citations

Journal ArticleDOI
TL;DR: This paper reviews the direct connection of sensors to microcontrollers without using any analogue circuit (such as an amplifier or analogue-to-digital converter) in the signal path, thus resulting in a low-cost, lower-power sensor electronic interface.
Abstract: This paper reviews the direct connection of sensors to microcontrollers without using any analogue circuit (such as an amplifier or analogue-to-digital converter) in the signal path, thus resulting in a low-cost, lower-power sensor electronic interface. It first discusses the operating principle and explains how resistive and capacitive sensors with different topologies (i.e., single, differential and bridge type) can be directly connected to a microcontroller to build the so-called direct interface circuit. It then shows some applications of the proposed circuits using commercial devices and discusses their performance. Finally, it deals with the power consumption and proposes some design guidelines to reduce the current consumption of such circuits in active mode.

48 citations