Zhaojin Wen

Bio: Zhaojin Wen is an academic researcher from Peking University. The author has contributed to research in topics: Field-programmable gate array & Control theory. The author has an hindex of 2, co-authored 3 publications receiving 36 citations.

Implementation of a Multi-channel UART Controller Based on FIFO Technique and FPGA

Abstract: To meet modern complex control systems communication demands, the paper presents a multi-channel UART controller based on FIFO (first in first out) technique and FPGA (field programmable gate array). The paper presents design method of asynchronous FIFO and structure of the controller. This controller is designed with FIFO circuit block and UART (universal asynchronous receiver transmitter) circuit block within FPGA to implement communication in modern complex control systems quickly and effectively. Form the communication sequence diagrams, it is easily to know that this controller can be used to implement communication when master equipment and slaver equipment are set at different Baud Rate. It also can be used to reduce synchronization error between sub-systems in a system with several sub-systems. The controller is reconfigurable and scalable.

Implementation of 2-axis Circular Interpolation for a FPGA-based 4-axis Motion Controller

Abstract: To satisfy the motion control of numerical control machine and robot, this paper introduces an approach to implement 4-axis motion controller based on field programmable gate array (FPGA). Starting with introduction to existing excellent 4-axis motion controller MCX314, this paper describes the fundamental structure of the FPGA-based 4-axis motion controller. As the one of main function modules in controller, the implementation of 2-axis circular interpolation module in FPGA is the main content to be discussed in the paper. Employing a novel analogy digital differential analyzer (DDA), the interpolation module avoids plentiful complex on-the-motion computation with skillful combination with the hardware structure of FPGA; hence the real-time performance and precision are enormously improved. In the paper, the principle of algorithm and approach of hardware implementation are discussed in detail; with introduction to the structure of the circular interpolation module, a testing platform is developed to evaluate the performance of the module. The testing experiment indicates that the performance of controller is excellent, and the implementation approach will be valuable for domestic research and development about the motion controller.

Design of a Multiplex Data Collecting Controller Based on FPGA

Abstract: In order to satisfy some requirements for special data acquisition systems, in this paper, a new design method used by data collecting controller is introduced. The main objective of this approach is to integrate DAC and ADC chips into one FPGA (Field programmable Gate Array) chip. The controller can not only collect multiplex analog data, but also output multiplex analog controlling signals, coupled with a minimum amount of external components. At the same time, this approach reduces the cost of hardware and resource of software exceedingly. Employing the principle of PWM, the paper puts forward a new design method to implement conversion between digital signal and analog signal without special DAC or ADC based on FPGA. Moreover, the principle and working mechanism of the controller is discussed in details, while the internal circuit block diagram is also presented.

A low power UART design based on asynchronous techniques

Abstract: Universal Asynchronous Receiver Transmitter (UART) implements serial communication between peripherals and remote embedded systems. The UART protocol is defined based on fixed frequencies with a sampling method to achieve robustness under reasonable frequency variations between systems. Such design specifications are natural for clocked domains. This work investigates whether this simple clocked hardware protocol can be advantageously implemented using asynchronous design techniques. A full duplex clocked and asynchronous UART are implemented and compared. The asynchronous design results in average power of about one-fourth that of the clocked design under standard operating modes.

Design and implementation of high performance motion controller for 2-D delta robot

Abstract: Conventionally, software-based motion controllers are used to execute many automation systems in the industry. Most of these controller reveal several drawbacks such as large accumulated error, does not guarantee real-time characteristics when generating motion profile based on software. In this paper, the implementation of embeded motion controller for many applications is presented. ARM Cortex M4 is designed in this controller to handle the communication between host PC and controller. To enhance the high performance of generating trajectory path, hardware-based motion chipset is integrated into the controller. Experimental platform of 2-D delta robot is driven by proposed controller to show the pick and place operations. Several results are carried out to validate the effectiveness and feasibility.

An FPGA implementation of shift converter block technique on FIFO for RS232 to universal serial bus converter

Abstract: To meet the standard modern system communication demands, the paper represents the implementation of bidirectional shift converter technique for the embedded converter RS232 to Universal Serial Bus circuit block within FPGA using Verilog HDL language to be applied in a system wireless communication within Zigbee protocol. Utilizing the ModelSim-Altera, RTL model of the shift converter was developed and synthesized then stimulated using TimeQuest Timing Analyzer to observe its functionality.

Design of a low-vibration micro-stepping controller for dom-camera

Abstract: Fast, smooth and accurate motion is the important properties of dom-camera (DC). In the case of a high ratio zoom lens, low vibration characteristic is an also crucial point in driving pan-tilt mechanism in DC. In this paper, a novel micro-stepping controller with a function of adjusting reference current was designed using field programmable gate arrays (FPGA) technology for high zoom ratio dom-camera. The proposed variable reference current (VRC) control scheme reduces vibration and increases maximum acceleration without missing steps. By employing VRC control scheme, the vibration in low speed could be significantly minimized. The proposed controller can also make very high speed of 378k pps micro-step driving, and increase maximum acceleration in motion profiles.

Design and Implementation of 2-Axis Circular Interpolation Controller in Field Programmable Gate Array (FPGA) for Computer Numerical Control (CNC) Machines and Robotics

Abstract: This paper presents design and implementation of a 2 axis Circular Interpolation Controller in a Xilinx Spartan 6 FPGA to control a 2D Circular motion of a CNC machine or robotic arm. It is implemented using Verilog HDL. Circular motion like linear motion is one of the fundamental movement and an absolute necessity for any motion controller. High precision, repeatability and direction-independent are the three important factors to evaluate the performance of circular interpolation algorithm. To achieve this, a novel analogy Digital Differential Analyzer (DDA) algorithm based circular interpolation controller is implemented, which avoids complex on-the-motion computation with skillful combination of the accumulator and multiplier based hardware structure of FPGA. Hence the real-time performance and precision are enormously improved. The principle of algorithm and its hardware implementation with macro and micro architecture design are discussed in detail in the paper. The simulation results verify the excellent performance and effectiveness of implemented circular interpolation controller. General Terms CNC machines, Robotics, Circular interpolation, Motion Controllers, FPGA