Zhihong Feng

Bio: Zhihong Feng is an academic researcher from Hong Kong University of Science and Technology. The author has contributed to research in topics: Electron mobility & High-electron-mobility transistor. The author has an hindex of 21, co-authored 196 publications receiving 1655 citations. Previous affiliations of Zhihong Feng include Hangzhou Dianzi University & Shandong University.

Enhancement-Mode Operation of Nanochannel Array (NCA) AlGaN/GaN HEMTs

Abstract: In this letter, enhancement-mode (E-mode) AlGaN/ GaN high electron mobility transistors (HEMTs) were demon- strated based on lateral scaling of the 2-D electron gas channel using nanochannel array (NCA) structure. The NCA structure consists of multiple parallel channels with nanoscale width defined by electron-beam lithography and dry etching. Because of the improved gate control from the channel sidewalls and partially relaxed piezoelectric polarization, the fabricated 2 μm-gate-length NCA-HEMT with a nanochannel width of 64 nm showed a thresh- old voltage of +0.6 V and a higher extrinsic transconductance of 123 mS/mm, compared to -1.6 V and 106 mS/mm for the conventional HEMT with μm-scale channel width. The scaling of threshold voltages, peak transconductance, and gate leakage as a function of the nanochannel width were investigated. Small-signal RF performance of NCA-HEMTs were characterized for the first time and compared with those of conventional HEMTs.

Lateral β-Ga 2 O 3 MOSFETs With High Power Figure of Merit of 277 MW/cm 2

Abstract: In this work, we have demonstrated high-performance lateral $\beta $ -Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) with state-of-art power figure-of-merit (P-FOM) and breakdown voltage (BV) by adopting a T-shape gate field-plate and source connected field-plate structures. Depletion-mode (D-mode) $\beta $ -Ga2O3 MOSFETs with gate-to-drain distance ( $\text{L}_{\sf GD}$ ) of $4.8~\mu \text{m}$ /17.8 $\mu \text{m}$ demonstrate a BV of 1.4 kV/2.9 kV and specific ON-resistance ( $\text{R}_{ \mathrm{\scriptscriptstyle ON}, {\sf sp}}$ ) of 7.08 $\text{m}\Omega \cdot $ cm2/46.2 $\text{m}\Omega \cdot $ cm2, respectively, yielding a high P-FOM of 277 MW/cm2 and averaged electrical field of 2.9 MV/cm for the device with $\text{L}_{\sf GD} = {\sf 4.8}\,\, \mu \text{m}$ . To the best of all the authors’ knowledge, this P-FOM of 277 MW/cm2 and BV = 2.9 kV are the highest values among all the lateral D-mode $\beta $ -Ga2O3 MOSFETs. Combined with negligible gate pulsed and drain pulsed current collapse and drain current on/off ratio of 109, these $\beta $ -Ga2O3 MOSFETs show a great potential for future power electronic applications.

Source-Field-Plated $\beta$ -Ga 2 O 3 MOSFET With Record Power Figure of Merit of 50.4 MW/cm 2

Abstract: In this letter, source-field-plated $\beta $ -Ga2O3 MOSFETs are fabricated on Si-doped homoepitaxial film on (010) Fe-doped semi-insulating $\beta $ -Ga2O3 substrate. Ohmic contact resistance ( ${R}_{\textsf {c}}$ ) between metal- and ion-implanted source/drain layer of $1.0~\Omega ~\cdot $ mm is obtained by employing the Si-ion implantation. The fabricated source-field-plated $\beta $ -Ga2O3 MOSFETs with source-to-drain distance ( ${L}_{\textsf {sd}}$ ) of 11 and $18~\mu \text{m}$ present high-saturation drain current ( ${I}_{\textsf {ds,sat}}$ ) of 267 and 222 mA/mm with low ${R}_{\textsf {on,sp}}$ of 4.57 and 11.7 $\text{m}\Omega ~\cdot $ cm2, respectively. The drain extension in the source-field plate effectively suppresses the peak electric field and improves the breakdown voltage greatly. The destructive breakdown voltages ( ${V}_{\textsf {br}}$ ) are measured to be 480 and 680 V for the devices with ${L}_{\textsf {sd}}$ of 11 and 18 $\mu \text{m}$ , respectively. Most of all, the power figure of merit ( ${V}_{\textsf {br}}^{\textsf {2}}/{R}_{\textsf {on,sp}})$ is as high as 50.4 MW/cm2, which is the highest value among any $\beta $ -Ga2O3 MOSFETs ever reported.

Demonstration of β-Ga 2 O 3 Junction Barrier Schottky Diodes With a Baliga's Figure of Merit of 0.85 GW/cm 2 or a 5A/700 V Handling Capabilities

Abstract: In this article, we report on demonstrating the first vertical β-Ga2O3 junction barrier Schottky (JBS) diode with the implementation of thermally oxidized p-type NiO to compensate for the dilemma of the forfeit of the p-type β-Ga2O3. With this wide-bandgap p-type NiOx, β-Ga2O3 JBS diodes with an area of 100 × 100 μ m2 achieve a breakdown voltage (BV) and specific on -resistance R on,sp of 1715 V and 3.45 mΩ·cm2, respectively, yielding a Baliga's figure of merit (FOM) of BV2/ R on,sp = 0.85 GW/cm2, which is the highest direct-current FOM value among all β-Ga2O3 diodes. Meanwhile, a large size JBS diode with the area of 1 × 1 mm2 shows a forward current IF and BV of 5 A/700 V, which is also the best IF and BV combinations (FOM = 64 MW/cm2) among all published results about large-area Ga2O3 diodes. Dynamic switching characteristics reveal that the diode suffers from a negligible current collapse phenomenon even at a −600 V and 103 s stress, showing the great promise of implementing p-NiO in the future β-Ga2O3 power electronic devices.

A review of Ga2O3 materials, processing, and devices

Abstract: Gallium oxide (Ga2O3) is emerging as a viable candidate for certain classes of power electronics, solar blind UV photodetectors, solar cells, and sensors with capabilities beyond existing technologies due to its large bandgap. It is usually reported that there are five different polymorphs of Ga2O3, namely, the monoclinic (β-Ga2O3), rhombohedral (α), defective spinel (γ), cubic (δ), or orthorhombic (e) structures. Of these, the β-polymorph is the stable form under normal conditions and has been the most widely studied and utilized. Since melt growth techniques can be used to grow bulk crystals of β-GaO3, the cost of producing larger area, uniform substrates is potentially lower compared to the vapor growth techniques used to manufacture bulk crystals of GaN and SiC. The performance of technologically important high voltage rectifiers and enhancement-mode Metal-Oxide Field Effect Transistors benefit from the larger critical electric field of β-Ga2O3 relative to either SiC or GaN. However, the absence of clear demonstrations of p-type doping in Ga2O3, which may be a fundamental issue resulting from the band structure, makes it very difficult to simultaneously achieve low turn-on voltages and ultra-high breakdown. The purpose of this review is to summarize recent advances in the growth, processing, and device performance of the most widely studied polymorph, β-Ga2O3. The role of defects and impurities on the transport and optical properties of bulk, epitaxial, and nanostructures material, the difficulty in p-type doping, and the development of processing techniques like etching, contact formation, dielectrics for gate formation, and passivation are discussed. Areas where continued development is needed to fully exploit the properties of Ga2O3 are identified.

Two-dimensional materials and their prospects in transistor electronics

Abstract: During the past decade, two-dimensional materials have attracted incredible interest from the electronic device community The first two-dimensional material studied in detail was graphene and, since 2007, it has intensively been explored as a material for electronic devices, in particular, transistors While graphene transistors are still on the agenda, researchers have extended their work to two-dimensional materials beyond graphene and the number of two-dimensional materials under examination has literally exploded recently Meanwhile several hundreds of different two-dimensional materials are known, a substantial part of them is considered useful for transistors, and experimental transistors with channels of different two-dimensional materials have been demonstrated In spite of the rapid progress in the field, the prospects of two-dimensional transistors still remain vague and optimistic opinions face rather reserved assessments The intention of the present paper is to shed more light on the merits and drawbacks of two-dimensional materials for transistor electronics and to add a few more facets to the ongoing discussion on the prospects of two-dimensional transistors To this end, we compose a wish list of properties for a good transistor channel material and examine to what extent the two-dimensional materials fulfill the criteria of the list The state-of-the-art two-dimensional transistors are reviewed and a balanced view of both the pros and cons of these devices is provided

Gallium nitride devices for power electronic applications

Abstract: Recent success with the fabrication of high-performance GaN-on-Si high-voltage HFETs has made this technology a contender for power electronic applications. This paper discusses the properties of GaN that make it an attractive alternative to established silicon and emerging SiC power devices. Progress in development of vertical power devices from bulk GaN is reviewed followed by analysis of the prospects for GaN-on-Si HFET structures. Challenges and innovative solutions to creating enhancement-mode power switches are reviewed.

Co-designing electronics with microfluidics for more sustainable cooling.

Abstract: Thermal management is one of the main challenges for the future of electronics1–5. With the ever-increasing rate of data generation and communication, as well as the constant push to reduce the size and costs of industrial converter systems, the power density of electronics has risen6. Consequently, cooling, with its enormous energy and water consumption, has an increasingly large environmental impact7,8, and new technologies are needed to extract the heat in a more sustainable way—that is, requiring less water and energy9. Embedding liquid cooling directly inside the chip is a promising approach for more efficient thermal management5,10,11. However, even in state-of-the-art approaches, the electronics and cooling are treated separately, leaving the full energy-saving potential of embedded cooling untapped. Here we show that by co-designing microfluidics and electronics within the same semiconductor substrate we can produce a monolithically integrated manifold microchannel cooling structure with efficiency beyond what is currently available. Our results show that heat fluxes exceeding 1.7 kilowatts per square centimetre can be extracted using only 0.57 watts per square centimetre of pumping power. We observed an unprecedented coefficient of performance (exceeding 10,000) for single-phase water-cooling of heat fluxes exceeding 1 kilowatt per square centimetre, corresponding to a 50-fold increase compared to straight microchannels, as well as a very high average Nusselt number of 16. The proposed cooling technology should enable further miniaturization of electronics, potentially extending Moore’s law and greatly reducing the energy consumption in cooling of electronics. Furthermore, by removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip. Cooling efficiency is greatly increased by directly embedding liquid cooling into electronic chips, using microfluidics-based heat sinks that are designed in conjunction with the electronics within the same semiconductor substrate.