Zurab Kiguradze

Bio: Zurab Kiguradze is an academic researcher from Missouri University of Science and Technology. The author has contributed to research in topics: Bayesian optimization & Nonlinear system. The author has an hindex of 3, co-authored 14 publications receiving 15 citations. Previous affiliations of Zurab Kiguradze include University of Missouri & Georgian Technical University.

Robust Extended Unterminated Line (EUL) Crosstalk Characterization Techniques for High-Speed Interconnect

Abstract: Extend Unterminated Line (EUL) structure allows crosstalk measurements with perfect termination and halves the number of test ports required by the traditional method. Therefore, EUL is a time-efficient and convenient structure for a test vehicle design of high-speed interconnects. In this paper, the potential errors in the EUL measurement are analyzed. In addition, an error detection method to check for causality, passivity and reciprocity is demonstrated. It is the first time to propose the best practices and robustness-enhancement techniques for EUL crosstalk characterization.

Bayesian Optimization for Stack-up Design

Abstract: Black-box function optimization is a challenging problem worldwide. Bayesian Optimization is a powerful method used to handle the optimization of functions, which are usually too costly for evaluation. Non-convex black-box function optimization arises in many applied problems. One example of such kind of problems is the PCB stack-up design. With its various covariance functions and different values of hyper-parameters Bayesian Optimization is applied for five-dimensional stack-up design optimization. The results obtained using the Bayesian Optimization are compared with results of other methods.

Bayesian Optimization for High-Speed Channel Equalization

Abstract: Equalization methods are used to recover the signal attenuated by channel loss. Different optimization algorithms are applied to find the best tap coefficients for each equalization that will improve eye opening and reduce bit error rate. The goal function for most equalization optimization algorithms is to reduce the difference between input and output signals, which is a linear optimization problem and can be solved relatively easily. This indirectly will increase eye height and improve eye diagram. Directly optimizing eye height is a non-linear problem and cannot be solved with analytical method. We are proposing FFE and DFE combined equalization optimization algorithm that optimizes directly eye height using Bayesian Optimization (BO). The proposed algorithm can be generalized for multi-level signals.

Combined Optimization of FFE and DFE Equalizations

Abstract: The rapid growth of data centers along with the development of faster computers, tablets and phones drive a constant demand for networks with higher data rates, that is limited by channel bandwidth. Equalization methods are used to recover the signal attenuated by channel, crosstalk, jitter and other noise. Different optimization algorithms are applied to find the best parameters for each equalization. When optimization algorithms work separately with Feed Forward Equalization (FFE) and Decision Feedback Equalization (DFE), found tap coefficients of FFE and DFE do not give optimal result during joint equalization. In the present paper FFE and DFE joint optimization algorithm is introduced that can be solved analytically. Proposed joint optimization method allows FFE and DFE tap coefficients to collaborate and leads to the optimal equalization result. The proposed method is fast, easy to implement and efficient. The algorithm can be generalized for multi-level signals as well.

An Integer Programming Application for PCB Stack-up Arrangement

Abstract: This paper introduces an integer programming application for PCB stack-up arrangement. The general rules in stack-up arrangement are transformed to equalities and inequalities using mathematical programming techniques. Then the integer programming solver can solve the stack-up arrangement problem very efficiently for a PCB with 20 layers or more.

Electrodynamics Of Continuous Media

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Demystifying Machine Learning for Signal and Power Integrity Problems in Packaging

Abstract: In this article, we cover the fundamentals of neural networks and Bayesian learning with a focus on signal and power integrity problems arising in packaging. Rather than only focus on mathematical formulations, we explain the important concepts and the intuition behind them, thereby demystifying the use of machine learning for these problems. We also share some of the recent developments in this area along with future research directions in the context of packaging. Links to open-source downloadable software for some of the methods discussed are also provided.

Adaptive Equalization for Dispersion Mitigation in Multi-Channel Optical Communication Networks

Abstract: Optical communication networks (OCNs) provide promising and cost-effective support for the ultra-fast broadband solutions, thus enabling them to address the ever growing demands of telecommunication industry such as high capacity and end users’ data rate. OCNs are used in both wired and wireless access networks as they offer many advantages over conventional copper wire transmission such as low power consumption, low cost, ultra-high bandwidth, and high transmission rates. Channel effects caused by light propagation through the fiber limits the performance, hence the data rate of the overall transmission. To achieve the maximum performance gain in terms of transmission rate through the OCN, an optical downlink system is investigated in this paper using feed forward equalizer (FFE) along with decision feedback equalizer (DFE). The simulation results show that the proposed technique plays a key role in dispersion mitigation in multi-channel optical transmission to uphold multi-Gb/s transmission. Moreover, bit error rate (BER) and quality factor (Q-factor) below 10 − 5 and above 5, respectively, are achieved with electrical domain equalizers for the OCN in the presence of multiple distortion effects showing the effectiveness of the proposed adaptive equalization techniques.

Bayesian Optimization for High-Speed Channel Equalization

Abstract: Equalization methods are used to recover the signal attenuated by channel loss. Different optimization algorithms are applied to find the best tap coefficients for each equalization that will improve eye opening and reduce bit error rate. The goal function for most equalization optimization algorithms is to reduce the difference between input and output signals, which is a linear optimization problem and can be solved relatively easily. This indirectly will increase eye height and improve eye diagram. Directly optimizing eye height is a non-linear problem and cannot be solved with analytical method. We are proposing FFE and DFE combined equalization optimization algorithm that optimizes directly eye height using Bayesian Optimization (BO). The proposed algorithm can be generalized for multi-level signals.

The Simulated TDR Impedance In PCB Material Characterization

Abstract: High-speed PCB design for signal integrity (SI) is about feasible material selection, trace geometry determination and optimization of discontinuities, where the accurate PCB material characterization is essential since incorrect material properties may lead to misleading results and wrong design descisions. The previous studies have revealed that the simulated time-domain reflectometry (TDR) impedance in material characterization, which is based upon the transmission-line-based methods, is erroneous when compared to the measured value, although a good agreement between simulation and measurement in the frequency domain can always be reached. In addition, it is also shown that achieving a satisfactory correlation in both transmission phase and trace impedance is a challenge for SI engineers. This implies that the transmission-line-based approaches, which are widely used in industries, are not perfect and that the extracted PCB material properties are not accurate enough. In this paper, a step-by-step investigation is performed and demonstrated to disclose the root causes of the TDR impedance discrepancy. It is found that the disagreement in TDR impedance is contributed by multiple factors which need to be taken into consideration during material characterization. The improved simulation result exhibits excellent consistency with the measured trace impedance. The suggestions to hardware designers on how more accurate PCB dielectric properties can be obtained are given by addressing the TDR impedance discrepancy issue.