Showing papers presented at "AUTOTESTCON in 1988"

Experiences gained using the Navy's IDSS weapon system testability analyzer

Abstract: The weapon system testability analyzer (WSTA), which has the ability to measure the testability of a design by modeling the actual process used during online, real-time fault diagnosis, is described. The results of experiences gained applying the ESTA to various levels of analysis are presented, including: built-in test (BIT) assessment at the organizational level; verification of complete testability from system, subsystem, and weapon replacable assembly (or line-replaceable unit) levels; and, through card-level testability, detection and isolation accurately and efficiently at the piece-part level. The ease of modeling, the reports generated and their usefulness to the testability process, and the unique features associated with the use of the tool are discussed. >

Universal Ada Test Language (UATL) to support real-time software/system integration and factory/maintenance fault isolation (military avionics)

Abstract: The Universal Ada Test Language (UATL), developed to encourage, and provide support to, the use of Ada in eventually replacing ATLAS, BASIC, and other special-purpose test control languages for generating automatic test programs, is presented. The UATL consists of a set of modular, portable, Ada packages that define a higher-level test language that supports the generation of test programs in Ada. These packages provide the user with a complete complement of standardized reusable test functions that shorten the test-program-generation effort. These test functions include interactive test operator controls, real-time test data stimulus/response, data recording, and data reduction. The UATL also allows the sophisticated user to develop any unique test functions at the Ada code level. >

Integrating diagnostic knowledge

Abstract: Three model-based diagnostic approaches have been developed: heuristic probing, simulation using truth maintenance, and simulation using constraint relaxation. Heuristic probing uses a variety of information to determine the order in which measurements are made. Truth maintenance uses complex simulation models to compare measured and expected signal values and then derive a diagnosis. Simulation with constraint relaxation is similar to truth maintenance, but heuristics can be applied to limit the amount of simulation performed. The key feature of each approach is the elimination of manual diagnostic test programming. >

An embedded expert system for portable ATE

Abstract: By embedding an expert system into portable automatic test equipment (ATE) the sophistication and capability of the testing system was increased while maintaining the compactness of the portable ATE. The results of this effort are presented, and include reductions in both the number and size of fault ambiguity sets, and the ability of the system to detect and isolate multiple faults. By combining information from built-in-test (BIT) results, user observations, and failure histories, the mean time to repair was reduced because utilization of this information permitted dynamic creation of an optimal test sequence. In addition, the recommendations presented have a greater amount of confidence associated with them because the intelligent maintenance aid (IMA) allows enhancement of existing ATE without major modifications to the hardware. >

ATLAS EXTEND, its effect on ATE system software

Abstract: The EXTEND statement permits the rapid expansion of the ATLAS vocabulary to meet the challenge of testing novel technologies. However, it has been argued that all of the standardization afforded by the very careful deliberations of the ATLAS language maintenance committee will be lost due to the EXTEND statement, because each ATLAS programmer will be free to invent his own vocabulary. A means whereby the responsiveness of EXTEND may be realized without the anarchy of complete freedom for the test program writer is described. >

The enemy is FA, CND, and RTOK (avionics testing)

Abstract: Integrated diagnostic requirements of a modern avionic subsystem are identified. A conceptual integrated diagnostic approach to meeting these requirements is postulated. Its essential elements, layered onboard built-in test (BIT), flight-line BIT augmentation, depot automatic test equipment (ATE), and a diagnostic support information system are described. Modern maintenance concepts into which these must be embedded are outlined and discussed. Mechanisms for false alarm (FA), cannot duplicate (CND), and retest OK (RTOK) events are identified, and their adverse impact assessed using both historical data and analytical examples. Corrective approaches are identified and their potential effectiveness examined. Criteria for evaluating ID tradeoffs in this milieu are identified. >

Diagnostic automation-a total systems approach

Abstract: Diagnostics automation in the integrated support concept is described in terms of its primary attributes and their normal relationship to one another. The description is set forth with the understanding that each attribute may have both managerial and technological aspects and, in the broadcast sense, could be evaluated from the standpoint of how it contributes to the resolution of chronic support deficiencies. >

A systems approach to portable testers total test system integration (T/sup 2/SI)

Abstract: A type of systems architecture that will produce the portable automatic test equipment (ATE) to meet the growing demand for true portability and versatility is discussed. An approach to resolving the standardization issued by providing a portable test system that is generic, reprogrammable, and reconfigurable in architecture, which will allow new technology insertion regardless of the test system application, is presented. The system architecture discussed is a total test system integration or T/sup 2/SI. The benefits of using a systems approach solution for portable ATE include lower life-cycle costs and shorter systems development for test applications. >

Testing concepts and applications for the Strategic Defense Initiative (SDI)

Abstract: The potential application of automatic test concepts to elements of the Strategic Defense Initiative (SDI) program, which include ground surveillance tracking satellites, exoatmospheric re-entry interceptor subsystems, and the SDI battle management system which will be used for command, control, and communications, and to simulate and validate the SDI battle concept, is explored. The discussion centers on the technology and possible systems that may benefit from current or future automatic test equipment (ATE) technology, and potential test requirements these systems may carry. Current and projected SDI funding levels, current schedules, and targeted deployment data are also discussed and tied in to the approach, which revolves around the concept of applying automatic testing to the Strategic Defense Initiative. >

Automated development of test program sets for analog circuit modules

Abstract: A system for automatically generating test program sets for analog circuit modules is proposed. The aim is to use artificial intelligence techniques to capture the approach used by experienced test engineers. The circuit is described in terms of functional units consisting of groups of components which have some higher function in the circuit module. Knowledge of the characteristics of each type of functional unit is stored in a library. This information allows propagation of signals and error tolerances for use in simulation of the circuit. In addition, the knowledge for each functional unit type includes a list of faults to be detected, test strategies for detecting those faults, and heuristics for working backwards through the circuit to obtain signals required for a local test strategy. >

A portable miniature anechoic chamber

Abstract: The portable miniature anechoic chamber (PMAC), a low-cost alternative to a full-size anechoic chamber, is presented. The PMAC is a miniature, enclosed, RF-tight microwave antenna range, which approximates the performance of an indoor range over the C through Ku (G through J)-band frequencies. The small footprint, four by six feet, allows for ease of movement by one person to a test site, indoors or outdoors. The PMAC can be used at I (intermediate)-level to support the operational readiness (OR) requirements of the Army, Navy or Air Force. In conjunction with the antenna test equipment, and under TPS control, it can be used for performance verification, fault detection and fault isolation. A typical application using the PMAC in this operating mode is described. >

Universal Pin Electronics in portable testers

Abstract: The advantages of using a tester-per-pin concept in portable test stations are examined. These include: improved throughput, reduced tester size and power requirements, broadside test functions, multiport testing and reduced costs. Methods of extending digital and analog test frequencies to 75 MHz and of generating highly accurate clock subsystems are examined, along with unit-under-test (UUT) interface design considerations. >

Infrared automatic mass screening (IRAMS): an ATE solution

Abstract: A method of board test which implements infrared automated mass screening (IRAMS) is proposed. This technique bypasses the diagnostics portion of the repair cycle and using IRAMS to quickly screen circuit board and perform fault detection. The go-chain is needed only as a quality inspection tool. Therefore, by eliminating diagnostics, IRAMS can greatly reduce the overall cost of developing and maintaining a test program set. >

Benefits of using ATE systems in the testing of printed circuit boards

Abstract: An industrial-based pragmatic review is given of the economic and product-quality consequences of automatic test equipment (ATE) usage in printed circuit-board testing. Results indicated that the use of ATE systems in printed circuit-board test operations results in definable economic and quality-level benefits. Supporting data behind this conclusion was provided by the test operations at twenty industrial companies. The majority of these companies realized both economic savings and quality improvements with their ATE systems. Productivity and/or labor cost reductions in test operations caused substantial economic savings for the companies. Quality improvements were more difficult to quantify; however, there was general agreement that ATE systems allowed boards to be more thoroughly tested than was previously possible. >

Back to the future for integrated diagnostics (electronic military systems)

Abstract: The integrated-diagnostics methodology to correcting high failure ambiguity rates seeks to provide an effective mix of diagnostic capabilities to improve fault detection and isolation. A certain measure of success has been obtained in the reduction of failure ambiguity; however, considerable improvements may be attained using built-in-monitoring equipment (BIME) or a visually oriented performance-analysis workstation (VOPAW). These concepts are discussed. >

ATE hardware diagnostics, fault detection, and fault isolation tool (self-test adapter)

Abstract: The question of multiple levels of self-test for automatic test equipment (ATE) is examined, and a three-level self-test concept is proposed. Level one will verify test resource communications and built-in test (BIT), level two will check all of the switching resources, and level three will test the measurement and output stimulus resources. All three levels are distinct in their functions but each is dependent on the successful completion of the functions tested at the previous level. Depending on the problems encountered, only one or two levels of self-test will need to be run. >

Analysis tools for the evaluation of maintenance software

Abstract: The amalgamation of information from appropriate fields such as reliability, testability, logistic support, and software engineering gives rise to a constraint-based diagnostic logic model, which provides a valuable baseline for test software requirement definition. It is proposed that the resulting requirements be represented and assessed using techniques similar to and extending those used for the static analysis of source code. This will provide both test package evaluation and acceptance teams (TPEATs) and contractors with the ability to optimize, verify, and validate test software throughout the lifecycle, place less reliance on dynamic tests based on the application of simulated faults and results in cheaper, more effective BIT (built-in testing) and ATE (automated test equipment) software. >

A comprehensive strategy for implementing BIT (weapon systems)

Abstract: To describe the problem to be solved by a BIT (built-in-test) strategy, the relation of BIT to integrated diagnostics is described, followed by a discussion of the uses of BIT and the inherently self-contradictory nature of BIT's requirements. Systems allocation issues are described, including the multiple dimensions of BIT, the functions of BIT, and BIT external interfaces. Some particular solutions to the false alarm problem are discussed, followed by a description of approaches to the successful implementation of BIT software and hardware. >

A case for Ada TPS programs

Abstract: An approach is proposed for integrating general-purpose Ada tools and special-purpose test-oriented tools in a test programming support environment. The approach capitalizes on the strengths of both Ada and ATLAS; test programs would be written in Ada except that they would use a standard test package, written in Ada and modeled after ATLAS, to implement the test-oriented functions. The standard test package would be linked into the test program so that its procedures could be called from the main program. The test package would contain procedures that perform signal-oriented functions such as applying an AC signal with parameters selecting the test instrument, amplitude, frequency, and connection. Standard Ada statements would be used for all other functions, such as control flow, input/output, and data processing. >

Hierarchical testing of VLSI systems based on device BIT

Abstract: VLSI/VHSIC technology poses critical test problems not only at the device level, but also at the system level. The extreme functional complexity and fail-operational redundancy of VLSI systems tends to render conventional performance testing inadequate, not only in terms of failure mode coverage, but also in terms of test-time requirements. The authors propose a design structure in which various subsystems and modules using VLSI devices are related to one another in a hierarchical test scheme based on the reporting of individual, device-level built-in-test (BIT) results. This hierarchical approach offers true consistency between operational (in-flight), organizational, and depot-level test methodologies. >

Hybrid diagnostic strategy for an expert system controlled automatic test system (EXATS)

Abstract: A prototype automated diagnosis system for a real-world unit under test (UUT) is presented. The system features a time-optimized test sequence with feedback of correctly diagnosed failures and a reduction of effort for test program development and maintenance. The diagnostic strategy used involves associative and model-based diagnosis. The experimental knowledge is organized as a hierarchical rulebase structure according to diagnoses. To model physical knowledge, a technique using logic programming extended by functions is introduced. >

Hybrid architecture of field-tested diagnostic expert system

Abstract: Three approaches to diagnostic expert systems have emerged: rule-based, dependency models, and deep-knowledge models. A fourth approach is a hybrid architecture that combines two or more of the three pure forms so that the strengths of one support the weaknesses of the other and vice versa. The advantages and disadvantages of each of these approaches are examined. AI-Ferret, a system that was field-tested by US Army technicians troubleshooting operational equipment, and which implements a rule-dependency hybrid architecture, is described. The conclusions are that: the hybrid architecture will become the dominant approach to practical diagnostic expert systems; and that cost and performance benefits of hybrids can be determined by the level of interaction between rule and model parts. >

Supercomputer applications to test systems (avionics and weapons applications)

Abstract: The applicability of supercomputer technology to test systems is examined. Potential supercomputer applications to test systems such as testing of very high-speed integrated circuit (VHSIC)-based avionics, fault-tolerance and fault-injection testing, and symptom-based diagnosis are discussed. >

Strategies for testing electro-optic devices

Abstract: A fully automatic modular ATLAS/CIIL-driven E/O (electro-optic) demonstrator is described. The system utilized collimation and sampling techniques to automate testing which has been previously performed manually. The resultant system is capable of testing existing units under test (UUTs) in a fraction of the time previously required. The system was used to test the F-18 E/O pod. >