Showing papers presented at "AUTOTESTCON in 2012"

Accelerated aging experiments for capacitor health monitoring and prognostics

Abstract: This paper discusses experimental setups for health monitoring and prognostics of electrolytic capacitors under nominal operation and accelerated aging conditions. Electrolytic capacitors have higher failure rates than other components in electronic systems like power drives, power converters etc. Our current work focuses on developing first-principles-based degradation models for electrolytic capacitors under varying electrical and thermal stress conditions. Prognostics and health management for electronic systems aims to predict the onset of faults, study causes for system degradation, and accurately compute remaining useful life. Accelerated life test methods are often used in prognostics research as a way to model multiple causes and assess the effects of the degradation process through time. It also allows for the identification and study of different failure mechanisms and their relationships under different operating conditions. Experiments are designed for aging of the capacitors such that the degradation pattern induced by the aging can be monitored and analyzed. Experimental setups and data collection methods are presented to demonstrate this approach.

Prognostics of Power Electronics, methods and validation experiments

Abstract: Failure of electronic devices is a concern for future electric aircrafts that will see an increase of electronics to drive and control safety-critical equipment throughout the aircraft. As a result, investigation of precursors to failure in electronics and prediction of remaining life of electronic components is of key importance. DC-DC power converters are power electronics systems employed typically as sourcing elements for avionics equipment. Current research efforts in prognostics for these power systems focuses on the identification of failure mechanisms and the development of accelerated aging methodologies and systems to accelerate the aging process of test devices, while continuously measuring key electrical and thermal parameters. Preliminary model-based prognostics algorithms have been developed making use of empirical degradation models and physics-inspired degradation model with focus on key components like electrolytic capacitors and power MOSFETs (metal-oxide-semiconductor-field-effect-transistor). This paper presents current results on the development of validation methods for prognostics algorithms of power electrolytic capacitors. Particularly, in the use of accelerated aging systems for algorithm validation. Validation of prognostics algorithms present difficulties in practice due to the lack of run-to-failure experiments in deployed systems. By using accelerated experiments, we circumvent this problem in order to define initial validation activities.

Automatic Modulation Recognition techniques based on cyclostationary and multifractal features for distinguishing LFM, PWM and PPM waveforms used in radar systems as example of artificial intelligence implementation in test

Abstract: Automatic Modulation Recognition (AMR) is an example of implementation of Artificial Intelligence to cognitive radio received signal software testing. This article proposes two fairly simple and computationally feasible AMR algorithms, based on the principles of cyclostationarity and multi-fractals, suitable for practical real-time software radio communications applications for distinguishing Linear Frequency Modulation (LFM or Chirp), Pulse Width and Pulse Position Modulations (PWM/PPM) waveforms used in Radar systems, both commercial and military, from other commonly employed modulations such as, for example, BPSK, BFSK, GMSK. In these techniques, the incoming received signal is processed to determine the cyclostationary and multifractal features of the waveforms which are later matched by a neural network classifier with corresponding feature patterns of stored modulated waveforms, declaring the appropriate modulation present for whichever waveform produces the highest matching output. A spreadsheet of classification probabilities for both techniques is generated which compares their performance for the six studied waveforms.

Distributed intelligent health monitoring with the coremicro Reconfigurable Embedded Smart Sensor Node

Abstract: Condition monitoring systems capable of efficiently and accurately diagnosing and identifying faults is a current need for ensuring the proper operation of critical systems. Distributed health monitoring leveraging large sensor networks that provide validated data ensures the proper operation and performance of systems. A key consideration is to have non-intrusive embedded sensors that can be easily added or removed. These needs have motivated the realization of a distributed intelligent health monitoring framework described in this paper based on standardized methods, advanced health monitoring functions at the sensor and system levels, and a state-of-the-art low-power miniature smart sensor (termed the coremicro Reconfigurable Embedded Smart Sensor Node). Major involved technologies consist of: (a) miniature embedded hardware; (b) embedded sensor health monitoring functions (e.g. sensor self-diagnostics, self-healing, and calibration); (c) distributed and intelligent health monitoring at the various system levels; (d) standardized design and communications leveraging the IEEE 1451 standards; and (e) an efficient anomaly awareness mechanism that merges the health monitoring and standardized design aspects.

A low-cost arc fault detector for aerospace applications

Abstract: The protection of the electrical plant, equipment and components in aerospace applications represents a topic of advanced researches. In the last years, in particular, great efforts have been focused on the problem of the arc-fault detection. The impressive advancement of the electronic devices has been exploited. As well known, in many cases the arcs are not detected by the conventional overcurrent breakers, despite their effects can be as serious as those produced by a short-circuit, since they may cause fires on board the aircrafts.

Soft error detection via double execution with hardware assistance

Abstract: As technology trends keep pushing cell dimensions in semiconductors to smaller geometries and higher densities, modern digital systems are increasingly becoming more vulnerable to reliability issues originated by soft errors. Various techniques used to detect soft errors are accomplished by incorporating redundancy into the hardware or software, but the penalty associated with the added redundancy can be measured by the high cost of the extra hardware or the degradation in performance for software-added redundancy. We are proposing a technique that compromise between hardware and software redundancy approaches. This approach is based on a software time redundancy combined with some hardware assistance. This hybrid technique has the potential to improve performance by adding a limited amount of hardware assistance when compared with a common time redundancy approach. It is also designed to set a foundation for further investigation into variations of this technique to improve soft error detection with better performance and less hardware.

Supporting a wide variety of communication protocols using partial dynamic reconfiguration

Abstract: Supporting a variety of communication protocols for test support equipment has typically required extensive hardware and Input/Output (I/O) interfaces targeting each protocol specifically. Recent advanced designs in the past ten years have created more dynamic approaches by using Field Programmable Gate Arrays (FPGAs) and embedded hardware to implement or simulate previous hardware I/O designs. The dynamic possibilities of FPGAs have recently been expanded with the introduction of Dynamic Partial Reconfiguration (DPR), which allows part of the FPGA to be reconfigured while the rest of the logic remains static. This paper evaluates the advantages and disadvantages of using DPR to interface with various communication protocols in test equipment.

A standards-based approach to gray-scale health assessment using fuzzy fault trees

Abstract: As part of a project to examine how current standards focused on test and diagnosis might be extended to address requirements for prognostics and health management, we have been exploring alternatives for incorporating facilities to represent gray-scale health information in the IEEE Std 1232 Standard for Artificial Intelligence Exchange and Service Tie to All Test Environments (AI-ESTATE). In this work, we extend the AI-ESTATE Common Element Model to provide “soft outcomes” on tests and diagnoses. We then demonstrate how to use these soft outcomes with the AI-ESTATE Fault Tree Model to implement a “fuzzy” fault tree. The resulting model then enables isolating faults within a system such that levels of degradation can also be tracked. In this paper, we describe the proposed extensions to AI-ESTATE as well as how those extensions work to implement a fuzzy fault tree using the demonstration circuit from previous Automatic Test Markup Language (ATML) demonstrations.

Windows Presentation Foundation (WPF) technology meets the challenges of operator interface design in automatic test systems

Abstract: The operator interface is the critical link between a test system and its operator. When a test fails, the operator must quickly process the results and decide whether to troubleshoot, rerun or halt the test based on information displayed by the software. An effective and well-designed operator interface can increase productivity, reduce testing time and operator error as well as improve adoption of the software. Whether the interface displays a simple pass/fail status or offers sophisticated troubleshooting operations, implementing a good user interface experience can be a challenging task.

A method of combining intermittent arc fault technologies

Abstract: Intermittent wire faults can be caused by harsh environments, handling or simply aging of the sheathing. These types of faults are difficult to isolate due to the intermittent nature. Recent advances in intermittent fault detection have provided the aerospace and defense industry new methods to test aging aircraft wiring. In particular the use of Low Energy High Voltage (LEHV) methods and Spread Spectrum Time Domain Reflectometry (SSTDR) has shown promise in locating intermittent faults in a variety of situations. These technologies have distinct advantages which best serve the industry in a combined package. This paper presents a novel method of combining these technologies in a portable fashion to solve the growing need for intermittent fault detection.

Component obsolescence management model for long life cycle embedded system

Abstract: This paper discusses the component obsolescence problem and presents a mathematic model for life cycle analysis of long life cycle embedded system maintenance. This model can estimate minimized management costs for different system architecture. Matlab is used to generate a graph and Lingo is used for linear programming. A simple CAN controller system case study is shown to apply this model. A minimized management cost and an optimized management time schedule are given as the result. The responses from the experiments of the model meet our expectation. Although the model has lots of simplifications and limitations, it can give management strategy guidance to the designers who suffer from component obsolescence problems.

An open source software framework for the implementation of an open systems architecture, run-time system

Abstract: This paper presents the outcome of a UK MoD sponsored development effort to provide a suite of source code that will be made available to contractors employed in the provision of test system software to the MoD and coalition partners. The primary purpose of this ‘open source software’ is to provide a working test system software framework that meets the requirements of the MoD's DEFSTAN 66-31 [1] (Open Systems Architecture); in particular, the use of IEEE 1641 [2] and ATML [3].

Digital up conversion VS IQ modulation using a wideband arbitrary waveform generator

Abstract: In many applications, including radar, EW and SIGINT, the modulation bandwidth requirements are constantly increasing, but at the same time excellent signal fidelity is necessary and distortions have to be kept at a minimum.

Testability modeling usage in design-for-test and product lifecycle cost reduction

Abstract: Weapon systems have become increasingly complex and customer funding has become constricted. Customers and contractors are in an environment where the cost of test systems has to be reduced yet still test effectively in order to remain competitive. In an effort to reduce the total development and lifecycle cost, companies are using Design-For-Test (DFT) methodologies to increase Built-In-Test (BIT) coverage and reduce the need for external Special Test Equipment (STE). Using test coverage analysis tools during prime hardware design efforts has benefits including identification of gaps in test capability, increased test coverage, test strategy optimization, increased accessibility, fault isolation and a reduction in overall test cost.

Security for mobile ATE applications

Abstract: Measurement data collected from hardware systems using a mobile application needs to be protected from falling into malicious hands. To circumvent security concerns, many sensitive ATE systems are simply isolated from networks and run in stand-alone environments. Using mobile connections with ATE equipment introduces a whole new level of security issues which can be a large concern for many companies. These concerns can generally be overcome by using a number of industry standard security protocols.

TPS design and development for CMA program using LM-STAR®

Abstract: Selex Galileo, a Finmeccanica Company, has been instructed by the Italian Air Force to define a new Automatic Test Equipment (ATE) solution for second level of maintenance to be used for the Avionic Centre (CMA) with reference to the Eurofighter Program. In particular, this resulted in Test Program Set (TPS) design and development for several Line Replaceable Units (LRU) of European Fighter (EF2000 Block 2) configuration. A further requirement is to have the same high level performance/reliability ATE opportunity to re-host some TPSs for Block 1 configuration, already designed and purchased in the past using another ATE, for improved work load distribution and to maintain and support them for many years beyond their original projected life expectancy.

Advancing RF test with open FPGAs

Abstract: The number of wireless devices, diversity of communication standards, and sophistication of modulation schemes are increasing dramatically each year. With each subsequent generation of technology, the cost of testing wireless devices using traditional techniques also has increased. One way to minimize hardware costs and reduce test time is to use virtual or synthetic instruments along with modular I/O; however, a new approach, software-designed instrumentation, not only provides microprocessor software flexibility but an open, user-programmable FPGA for further customization. This approach gives RF test engineers the ability to reduce test times orders of magnitude beyond what was previously possible without custom or standard-specific instrumentation. In this work, we demonstrate how a software-designed RF instrument can include an architecture that facilitates the record-based model of typical virtual or synthetic instruments. We show how this architecture can be extended with simple FPGA modifications to digitally control the device under test (DUT), reducing capital equipment costs by eliminating unnecessary instruments. We achieve a test time reduction of three orders of magnitude in a power leveling algorithm, common in RF power amplifier test. We also show how a software-designed RF instrument can be completely re-architected to implement a real-time RF channel emulator by including complex mathematical fading models on the FPGA. Using this approach, we demonstrate a 2×2 real-time MIMO channel emulator with up to 36 taps per fading filter.

Leveraging the cloud to create a network centric support environment for support equipment

Abstract: The Boeing Company Support Equipment & Services (SES) organization, in partnership with the Army, Ground Marine Corps and Navy, is leveraging the Cloud to create a Network Centric Support Environment for Support Equipment (SE) by developing and deploying the Next Generation Operations Management Software (NxOMS) within the Department of Defense (DoD).

Enhancing vibration analysis by embedded sensor data validation technologies

Abstract: This paper discusses a Structural Health Monitoring framework developed for aircraft airframes, where the objective is high performance vibration-based diagnostics using validated data from low power and miniaturized smart sensors. Although considerable research has been devoted to the structural health monitoring discipline, successful field implementations have not been widely achieved. This research presents a new embedded solution by integrating several state-of-the-art technologies. The system architecture is divided into two levels, with the low level built on embedded smart sensors capable of: self-diagnostics; high performance data acquisition; advanced vibration analysis; embedded admittance measurements; elastic wave generation; and wireless communications. A key capability is sensor data validation using an electromechanical impedance method, where failures in piezoelectric transducer elements as well as damage to the host structure are detected. Then, at the next level is a computation system hosting a graphical user interface with visualization methods, a feature extraction toolset, and advanced artificial neural network diagnostics. The overall goal of this research effort was to develop a system architecture with smart sensors and intelligent processing to be deployed in aircraft for the detection and isolation of global and incipient failures.

Test Strategies for minimizing the overall cost of test in moving from “cost based/government furnished equipment” to “firm fixed price” contracts

Abstract: As government aerospace defense contracts move to firm fixed price (FFP) and away from cost-based contracts companies are faced with re-structuring the whole product life cycle (PLC) process. Ensuring solid development and manufacturing strategies to meet the new emphasis toward Fixed Firm Price (FFP) procurements is crucial for the financial success of fulfilling the contract. An important aspect to this affordability is the development, implementation and operation of the test process. This paper will explore test strategies that look at maximizing test asset utilization, flexibility and overall cost of test throughout the product life cycle (development, manufacturing and support). It will discuss how developing test strategies that are coordinated between programs can drive affordability and ultimately drive competitive advantages in future contracts.

Simplifying test system development with IVI.NET

Abstract: The IVI Foundation has developed and maintained specifications for building instrument drivers for more than a decade Until recently, there were two choices for building IVI-compliant instrument drivers - IVI-COM and IVI-C Each of these driver technologies offers its own advantages for specific types of users, and each comes with its own set of disadvantages The release of the IVINET specifications from the IVI Foundation introduces a new mechanism for controlling instrumentation from test system software As a great deal of Windows desktop application development (as well as a considerable amount of web development) has shifted to the Microsoft NET platform, the demand for tools that help test system developers work with NET has grown Conventional desktop application developers have benefited considerably from the productivity gains of working with NET, and test system developers have already begun to enjoy the same Having a driver technology that fully capitalizes on the benefits of the NET platform and that marries naturally with NET-based test system software is critical This paper will examine the new IVINET standard and take a practical look at how IVINET drivers can simplify test system development

Low-cost and small footprint solution for testing low-voltage differential signal video displays

Abstract: In recent years, liquid crystal displays (LCD) have almost completely replaced older technologies such as cathode ray tube (CRT) displays in many industrial, commercial, aerospace, and military applications due to their increased efficiency, decreased weight, and smaller size. Likewise, the technology used to transmit video signals to LCD displays has evolved from analog standards such as the National Television Standards Council's (NTSC) RS-170 standard and the Phase Alternating Line (PAL) standard to higher speed digital standards such as the Digital Visual Interface (DVI) standard, High-Definition Multimedia Interface (HDMI) standard, and low-voltage differential signaling (LVDS) standard. This evolution of video standards has created a need for the test environments and test generation devices used to test video displays to mature as well.

Increasing the resolution of a uniform quantizer using a deterministic dithering signal

Abstract: Adding a dither signal to a signal to be measured is a known technique for improving the accuracy of a quantizer output. In this paper a measurement called effective bits is used to compare un-dithered signals, stochastically dithered signals, and deterministically dithered signals. A deterministic dither signal is found that adds one effective bit using only two dither points. With this dither signal, the number of effective bits continues to grow logarithmically with the number of dither points added.

Leveraging IVI for instrument wrapper development

Abstract: Most Automatic Test System environments create an abstraction layer that sits between the test program and the instruments drivers, a wrapper. This paper provides an overview of existing wrapper implementations, describes the benefits of abstraction layers, primarily to facilitate instrument replacement, and explores using the architecture defined by IVI to implement wrappers. Use of both existing IVI classes and new custom classes are discussed.

Circuit card test and diagnosis using electromagnetic emission analysis

Abstract: This paper describes the exploitation of spurious unwanted electromagnetic emissions from electronic circuits as a means to test and diagnose failures and performance anomalies within circuit cards and assemblies. Enhanced diagnostic capability with order-of-magnitude reduction in development and recurring costs as well as development time are likely outcomes of the successful realization of this approach. Testing is accomplished using non-contact methods providing a means to establish virtual test connectors throughout multi-layer circuit cards. Signals within electromagnetic fields that emanate across the frequency spectrum can be acquired and measured without removing protective conformal coatings. Signal propagation through the circuit card and between components is readily discernible using this technique, and the information content and intelligence contained within these signals can be used to determine the existence and the nature of faults, and probable fault location(s). Results achieved to date also indicate that electromagnetic field anomalies can reveal the existence of marginally performing components that may fail prematurely or where failure is imminent.

Using a plug-in model to simplify and enhance ATE test software capabilities

Abstract: An ATE software or test executive must perform a variety of tasks in addition to simply sequencing and running functional tests on the device under test (DUT). These tasks include prompting the test operator for a serial number and displaying test results, logging the results of the tests to a report, test system calibration and self-tests, and more.

Incorporating advanced instrumentation capabilities into a PXI digital multimeter instrument

Abstract: The use of card modular instrumentation for ATE systems offers test engineers many benefits - including lower acquisition costs, a more compact system footprint, and higher performance when compared to “box based” ATE architecture. In particular, upgrading to the PXI architecture can decrease both the physical and budgetary footprints, while still meeting the overall test requirements. However, for T&M instrument suppliers, incorporating the features and capabilities associated with advanced instrumentation into the PXI form-factor can present several design challenges, particularly in the areas of volume / real estate, noise, power consumption, and measurement stability. Additionally, these demanding requirements can be further challenged when the instrument is required to operate beyond the “normal” temperature range associated with commercial instrumentation. This paper discusses the requirements and techniques used to develop a PXI-based, high performance DMM. A review of the required performance parameters is presented along with an analysis of the alternative design methods employed in order to achieve the necessary performance capabilities without compromising the overall capabilities of the hardware. Areas covered in this paper include a discussion of design techniques which includes the use of multi-function circuitry to reduce overall volume requirements, the conversion of purely analog circuitry into a mixed signal format to reduce volume and power requirements, minimizing power supply noise when replacing a mains-based power supply with isolated and non-isolated DC/DC circuitry and the requirement to operate over an extended temperature range. Additionally, a review of the overall mechanical design with attention to the need to accommodate the noise and airflow considerations associated with the PXI architecture is discussed.

A new class of test instrument: The FPGA based module

Abstract: Testing involves applying stimulus to a device, called the Unit Under Test (UUT), and evaluating the measured response against the expected values. Traditional systems use discrete instruments to supply the stimulus and measure the response, but most devices are part of a larger system and may be a component of a closed control loop. Many devices are designed to respond to the inputs by generating outputs that are dependent on some part of the output being fed back to the inputs through the rest of the system. To be comprehensive, a test of such a device must include stimulus and response that matches, as closely as possible, the way the device is used in the full system. This requires test equipment that can alter the stimulus in response to the UUT's outputs. For low speed systems, software can often accomplish this, which is the traditional approach, but systems that require much faster response than practically accomplished in software are simply not tested in this fashion unless custom test hardware is designed to do it. This drives up the cost of test station and test program design, development, and maintenance, making it prohibitive except where crucial.

Architecting high-throughput PXI systems

Abstract: With the PC industry evolving from PCI to PCI Express in late 2005, the PXI industry was able to take advantage of this increase in available bus bandwidth and subsequently introduced the PXI Express specification. The PCI Express bus continues to evolve, while maintaining backwards compatibility, with the release of PCI Express 2.0 in 2010, and the PXI Express platform performance follows. These advancements enable PXI to meet the requirements of test and measurement applications that demand high data throughput capabilities. At the same time, they can problematically add a level of complexity to system architectures that require these increased bus capacities.

Testbricks: Software framework for IEEE Standard 1641 test programs

Abstract: A test program compliant with IEEE standard 1641-Signal and Test Definition (STD) standard has got two parts: the definition of the signals and the programmatic part. The standard doesn't define a programming language for the programmatic part, any commercial off-the-shelf (COTS) programming language fulfilling annex G requirements can be used. This protects the standard against obsolescence but it has got a drawback: there isn't a COTS programming language for the specific domain of STD test programs. Previous works have explored several options to add STD signals to general purpose programming languages but these techniques add complexity and decrease productivity compared to a domain specific solution. Testbricks is the result of several years investigating the creation of a software framework to allow an easy and straightforward development of STD test programs. This paper discusses the framework requirements, explains the key design features and describes the framework architecture.