Clemson University Power Systems Conference
About: Clemson University Power Systems Conference is an academic conference. The conference publishes majorly in the area(s): Electric power system & Smart grid. Over the lifetime, 274 publications have been published by the conference receiving 1768 citations.
••11 Mar 2014
TL;DR: In this paper, a modified z-source breaker is introduced for operation at medium-voltage dc with future applications in naval ship power systems, which limits capacitor current in the circuit and can be easily modified for fault detection.
Abstract: The z-source breaker has been introduced as a new circuit for quickly and automatically switching off in response to faults. A modified z-source breaker design is introduced for operation at medium-voltage dc with future applications in naval ship power systems. Compared to existing designs the respective design will allow for step changes in load. This new design also limits capacitor current in the circuit and can be easily modified for fault detection. Analysis of the breaker operation is presented during both fault and step changes in load. Low voltage laboratory validation of the breaker was carried out on two different versions of the proposed circuit.
••11 Mar 2014
TL;DR: The proximal message passing framework is extended to handle reliability constraints across scenarios, and the resulting algorithm is extremely scalable with respect to both network size and the number of scenarios.
Abstract: In this paper, we propose a distributed algorithm to solve the Security Constrained Optimal Power Flow (SC-OPF) Problem. We consider a network of devices, each with its own dynamic constraints and objective, subject to reliability constraints across multiple scenarios. Each scenario corresponds to the failure or degradation of a set of devices and has an associated probability of occurrence. The network objective is to minimize the cost of operation of all devices, over a given time horizon, across all scenarios subject to the constraints of transmission limit, upper and lower generating limits, generation-load balance etc. This is a large optimization problem, with variables for consumption and generation for each device, in each scenario. In this paper, we extend the proximal message passing framework to handle reliability constraints across scenarios. The resulting algorithm is extremely scalable with respect to both network size and the number of scenarios.
••08 Mar 2016
TL;DR: In this article, the authors demonstrate the stability and power quality problems that can occur in islanded medium voltage DERs, where the line impedance is dominantly resistive, and demonstrate the importance of the frequency and voltage stability as power utilities adopt more distributed energy sources.
Abstract: As the number of distributed energy sources (DERs) increases in a microgrid (MG), the likelihood of frequency and voltage instabilities increases. In particular, the control of frequency and voltage becomes a challenge in an islanded mode due to the inherent low-inertia feature of DERs compared to a grid-tied mode where there is a grid support. This instability problem becomes worse for low or medium voltage low-inertia MGs, where the line impedance is dominantly resistive. The goal of this paper is to demonstrate the stability and power quality problems that can occur in islanded medium voltage MGs. PSCAD/EMTDC simulation results for an MG with a high share of low-inertia power generation units illustrate the importance of the frequency and voltage stability as power utilities adopting more DERs.
••11 Mar 2014
TL;DR: In this article, security vulnerabilities associated with a synchrophasor network in a benchmark IEEE 68 bus (New England/New York) power system model are examined and recommended testing and verification methods are also presented.
Abstract: The addition of synchrophasors such as phasor measurement units (PMUs) to the existing power grid will enhance real-time monitoring and analysis of the grid. The PMU collects bus voltage, line current, and frequency measurements and uses the communication network to send the measurements to the respective substation(s)/control center(s). Since this approach relies on network infrastructure, possible cyber security vulnerabilities have to be addressed to ensure that is stable, secure, and reliable. In this paper, security vulnerabilities associated with a synchrophasor network in a benchmark IEEE 68 bus (New England/New York) power system model are examined. Currently known feasible attacks are demonstrated. Recommended testing and verification methods are also presented.
••08 Mar 2016
TL;DR: In this paper, a single household consumer forms the atomic nanogrid unit which may integrate its resources in a scalable model with the community to form a microgrid, without dependence of the national grid.
Abstract: In this work, central and distributed architectures of DC microgrids for rural electrification are analyzed under various operating conditions In the proposed scheme, a single household consumer forms the atomic nanogrid unit which may integrate its resources in a scalable model with the community to form a microgrid, without dependence of the national grid The flow of power between houses and the microgrid is implemented through a bidirectional flyback converter The operation of proposed scheme for two different architectures, ie distributed generation distributed storage architecture (DGDSA) and centralized generation centralized storage architecture (CGCSA) is evaluated at various distribution voltage levels and conductor sizes Modified Newton Raphson Method based analysis is performed for both architectures which show that distributed architecture has significant advantages over central architecture due to higher efficiency, low voltage drop and lower line losses Further, the scalable nature with minimum installation cost for distributed architecture makes it more favorable for rural electrification applications in comparison to central architecture The simulated results are also verified using a scaled down version of hardware implementation