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Showing papers presented at "Electrical Design of Advanced Packaging and Systems Symposium in 2009"


Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, the authors presented filters integrated in ultra thin multilayer organic substrate using 3D stitched capacitor alleviating shunt parasitics and providing tunable capacitors.
Abstract: This paper presents filters integrated in ultra thin multilayer organic substrate using 3D stitched capacitor alleviating shunt parasitics and providing tunable capacitors Insertion loss of less than 22dB, return loss of greater than 15dB at 24 GHz and attenuation of greater than 30dB below 20 GHz and at 47 GHz were measured The measured results showed good agreement with simulated results This paper demonstrated 24 GHz bandpass filters with size of 22mm × 30mm × 02mm (12mm3) in ultra thin organic RXP substrate

9 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, a CMOS test chip has been developed which has several test element groups (TEGs) inside MOS capacitor cells were distributed in each TEG in a different density.
Abstract: Power distribution network (PDN) of LSI has become one of important design parameters to reduce simultaneous switching noise for core circuits as well as I/O circuits Power distribution network of LSI generally consists of meshed power and ground conductors and on-chip decoupling capacitors For mobile communication and automotive applications, switching current of high-performance CMOS LSIs must be controlled to be low as possible in order to suppress associated electromagnetic interference (EMI) Therefore, on-chip decoupling capacitors must be properly arranged on a chip to optimize the amount of capacitor and to minimize the occupied area by on-chip capacitor In this paper, a CMOS test chip has been developed which has several test element groups (TEGs) inside MOS capacitor cells were distributed in each TEG in a different density Then, an evaluation board was designed to measure the power supply switching current for the each TEG Furthermore, the power supply switching current was simulated by using a commercial available EDA tool Reduction level of the switching current was measured and simulated as a function of the value of on-chip decoupling capacitor Based on both experimental and simulation results, it has been probed that proper density of decoupling capacitor on a chip has been well estimated

8 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: Using this design flow, an improved package is shown to have better performance of SI and PI under the condition of identical layout area and the chip-package co-simulation at time domain verified the validity of the design ideas.
Abstract: Based on the characteristic current on the stub series terminated logic (SSTL) topology, three design parameters, the effective power and ground inductance and the signal loop inductance, are proposed to evaluate on the performance of signal integrity (SI) and power integrity (PI) for the memory circuits. From these three parameters, a design flow systematically describes how to design the layout of package for the designers is presented. Using this design flow, an improved package, which refines from a real package substrate, are shown to have better performance of SI and PI under the condition of identical layout area. Finally, the chip-package co-simulation at time domain verified the validity of the design ideas.

7 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, a wideband microstrip-to-microstrip via transition for connecting integrated circuits and antenna array in a multi-layered low-temperature co-fired ceramic substrate is investigated.
Abstract: A wide-band microstrip-to-microstrip via transition used for connecting integrated circuits and antenna array in a multi-layered low-temperature co-fired ceramic substrate is investigated in this paper The via transition is decomposed into external and internal segments to facilitate the design The equivalent impedance of internal segment, consisting of multi-layered through-hole via with four ground vias, is calculated from the lump-circuit model generated by Ansoft Q3D Extractor The electrical performance of the external segment, consisting of via to microstrip lines, is evaluated by the microstrip-to-coax transition to choose appropriate via physical parameters Finally, the geometrical parameters of entire transition are obtained by combining the results of the external and internal segments It has been demonstrated, through the simulation results by commercial software Ansoft HFSS, that the return loss is better than 19dB over a band from DC up to 70GHz with an in-band insertion loss better than 048dB

7 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, the authors presented a design and simulation result of a miniaturized complementary diplexer realized by low-temperature co-fired ceramic (LTCC) technology.
Abstract: This paper presented a design and simulation result of a miniaturized complementary diplexer realized by low-temperature co-fired ceramic (LTCC) technology The diplexer consisted of two pass-bands, a central frequency of 1175GHz with bandwidth of 468% and a central frequency of 1925GHz with bandwidth of 286% respectively In the presented structure, we used transmission lines to realize the characteristics of lower pass-band, while lumped circular inductors were adopted to achieve the requirements of upper pass-band The interaction of the two filters was handled very well by using a complementary schematic We managed to make the VSWR on the antenna port less than 17 The final three-dimensional model occupied a volume of 32×25×195-mm

5 citations


Proceedings ArticleDOI
Joseph Kho1, Siew Goh Lim1, Yih Ling Tan1, Esther Cheng1, Man On Wong1 
01 Dec 2009
TL;DR: This new methodology enables efficient characterization of PLL block behaviour across different loop parameters and consequently, improves time-to-market of a new device or electronic system introduction.
Abstract: As data rates increase and jitter margins decrease, the need to precisely attain the performance of a PLL block becomes increasingly important. A PLL block's performance is reflected by its jitter transfer function, which is the ratio of output jitter to input jitter. A precise jitter transfer function requires a considerably large number of measurement points for the jitter transfer plot. The trade-off is an increase in measurement time. This paper presents a time-saving and cost effective jitter transfer measurement methodology that produces a precise jitter transfer function. This methodology extracts jitter transfer from the PLL output clock signal's power spectrum variation. The power spectrum varies according to controlled noise injected into the PLL input clock signal. Jitter transfer experimental data show significant increase in precision and reduction in measurement time compared to the conventional methodology. This new methodology enables efficient characterization of PLL block behaviour across different loop parameters and consequently, improves time-to-market of a new device or electronic system introduction.

5 citations


Proceedings ArticleDOI
Zhe Song1, Kai-Lai Zheng1, Hou-Xing Zhou1, Jun Hu1, Wei Hong1 
01 Dec 2009
TL;DR: Based on the frequency-varied relationship between surface wave poles and leaky wave poles of spectral Green's functions for a layered medium, a new method for fast locating the leaky Wave poles at the given operating frequency is established as mentioned in this paper.
Abstract: In this paper, based on the frequency-varied relationship between surface wave poles and leaky wave poles of spectral Green's functions for a layered medium, a new method for fast locating the leaky wave poles at the given operating frequency is established This method locates the leaky wave poles at the given operating frequency by consecutive frequency perturbations with the surface wave poles at a proper frequency as starting poles Numerical examples of this method applied in the combination with the discrete complex image method (DCIM) for evaluation of the Green's functions of microstrip and 2-layered medium models demonstrate the efficiency and accuracy of this method

5 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, the authors proposed a practical scheme to supply a stable voltage to the common power supply node of multiple I/Os switching simultaneously, and the simulation results show that the newly suggested scheme generates power supply noise-free eye opening and consumes almost the same amount of power as the conventional power plane scheme.
Abstract: To control SSN in the power delivery network, providing power through transmission line instead of voltage plane can lead to better performance. Several issues arise when the power transmission line is used in a real environment. Amongst them, a practical scheme presented in this paper focuses on supplying a stable voltage to the common power supply node of multiple I/Os switching simultaneously. The simulation results show that the newly suggested scheme generates power supply noise-free eye opening and consumes almost the same amount of power as the conventional power plane scheme.

5 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: It is confirmed that GPGPU-based LIM is very practical and efficient for the large-scale PDN simulations.
Abstract: With the progress of high-density integration technology of the circuits, a variety of signal and power integrity problems have become serious and important for the electronic design. This paper describes the fast circuit simulation by GPGPU-LIM (GPGPU-based Latency Insertion Method). First, LIM is reviewed, which is a fast algorithm. Next, implementation of LIM on the general purpose computing on graphic processing unit (GPGPU) is shown. Furthermore, this method is applied to the simulation of power distribution networks (PDNs). Finally, it is confirmed that GPGPU-based LIM is very practical and efficient for the large-scale PDN simulations.

4 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, the authors report the high-frequency characteristics of coaxial bend and via structures in comparison with those of a microstrip-line structure obtained using a three-dimensional electromagnetic field simulation.
Abstract: High-speed signal transmission of over 10 Gbps is required even for the signal transmission line of printed circuit boards (PCBs). To realize high-speed signal transmission, we developed a PCB technology with a rectangular coaxial line structure. The coaxial line structure is suitable for high-speed signal transmission because of its realization of precise characteristic impedance control and low crosstalk. In this paper, we report the high-frequency characteristics of coaxial bend and via structures in comparison with those of a microstrip-line structure obtained using a three-dimensional electromagnetic field simulation.

4 citations


Proceedings ArticleDOI
01 Dec 2009
TL;DR: This work uses GEMS, a 3-D high performance EM simulation software package, to efficiently simulate the packaging problems using one cell between the object and domain boundary and can generate the accurate results.
Abstract: We use GEMS, a 3-D high performance EM simulation software package, to efficiently simulate the packaging problems. Advanced boundary of GEMS software allows us to use one cell between the object and domain boundary and can generate the accurate results. Since GEMS can accurately simulate the very thin domain so that GEMS uses much less memory and faster than other EM simulation software.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: This presentation summarizes some recent advances of computational electromagnetics for complex structures encountered in circuits and packaging.
Abstract: This presentation summarizes some recent advances of computational electromagnetics for complex structures encountered in circuits. The results are applied for multi-scale computations encountered in computer circuits and packaging.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, the dispersion curves of the plasma modes, which exist in gyroresonance region, have been obtained by using Method of Moment (MoM) for the plasma column loaded cylindrical waveguide.
Abstract: In this study, the dispersion curves of the plasma modes, which exist in gyroresonance region, have been obtained by using Method of Moment (MoM) for the plasma column loaded cylindrical waveguide. In the study, the first three modes, which have lowest degree, have been investigated. The validation of the method has been tested by comparing the exact solution of the structure which exists in the literature. Comparative results have been presented numerically and graphically. Besides absolute error curves have been given for each structure.

Proceedings ArticleDOI
Joseph Kho1, Chooi Ian Loh1, Wui Hung Moo1, Chee Seong Fong1, Man On Wong1 
01 Dec 2009
TL;DR: The output buffer SSN effect on the phase-locked loop (PLL) input pins, PLL output pins, and PLL power supplies using an Altera FPGA device is analyzed to assist Altera's customers and electronic system designers in optimizing PLL performance for error-free device designs.
Abstract: Electronic devices are increasingly susceptible to simultaneous switching noise (SSN) as devices shrink in size and operate at lower voltage to achieve higher speed. This is a major concern in high-speed system designs as SSN causes voltage and timing variations which affect signal integrity. Consequently, it is imperative that electronic system designers pay strict attention to signal integrity whether it is on the chip level or on the system level. This paper analyzes the output buffer SSN effect on the phase-locked loop (PLL) input pins, PLL output pins, and PLL power supplies using an Altera FPGA device. Experimental results show that direct PLL jitter transfer principle cannot be applied in a straight forward manner because of the wide spectrum and asynchronous nature of SSN. However, the PLL circuit is still effective in filtering the noise that is attacking the PLL input signal. This paper also shows that SSN greatly affects the PLL power distribution network (PDN) especially when the noise coupled into the PDN have the same frequency as the PDN resonance. In addition, it is also shown that SSN do not directly attack the PLL circuit through its output. These findings assist Altera's customers and electronic system designers in optimizing PLL performance for error-free device designs. Furthermore, the findings provide a basis future PLL design improvements.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: A substrate integrated dielectric resonator utilizing multilayer printed circuit boards (PCB) for high performance microwave system-on-package applications such as low phase noise oscillators is presented in this article.
Abstract: This paper presents a substrate integrated dielectric resonators utilizing multilayer printed circuit boards (PCB) for high performance microwave system-on-package applications such as low phase noise oscillators. Via posts are used as for tightly confining electromagnetic energy as a metallic boundary wall so as the dielectric puck could be integrated into the multilayer PCB. The simulated results show that the resonator resonances at TE 01δ mode with a frequency at Ku band. The unloaded Q of the dielectric resonator is around 14,000 at the operating frequency. However, because of the limitation of the height between of the resonator in the multilayer PCB, conductive loss is increased and the unloaded Q of the resonators is reduced to about 3,500. In order to improve the phase noise of an oscillator, a variety of the dielectric resonators are developed to find out the best unloaded Q and correct frequency. EM Simulations and measurements show close agreements.

Proceedings ArticleDOI
Jeonghyeon Cho1, Eakhwan Song1, Jongjoo Shim1, Yujeong Shim1, Joungho Kim1 
01 Dec 2009
TL;DR: A fast and precise eye-diagram estimation method for a channel of a pair of differential microstrip lines on PCBs with arbitrary source and load terminations is proposed.
Abstract: In this paper, we propose a fast and precise eye-diagram estimation method for a channel of a pair of differential microstrip lines on PCBs with arbitrary source and load terminations. The voltage transfer function of a channel is investigated as a quick measure of the signal integrity of a channel and the DDJ and eye-opening voltage values are precisely estimated by using a modified peak distortion analysis. The efficiency and the accuracy of the proposed eye-diagram estimation method were successfully verified through HSPICE simulations.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, a thin-film solid state liquid-state liquid-cooler for COB direct assembly using supperlattice based thermoelectric material is reported.
Abstract: A thin film solid state cooler for COB direct assembly using supperlattice based thermoelectric material is reported The embedded cooler attached between the die chip and metal plate can provide site-specific cooling as well as active on-demand cooling This demonstration offers the possibility of thin film active cooling for the COB direct assembly The high power density of chip-on-Board would be no longer be limited by cooling capability This technology can be extended to the case of hot spot cooling for COB assembly that can be selectively switched on and off depending on which part of the chip is in critical need of cooling at any point of time

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, the authors present a summary of the development of Antenna-in-Package (AiP) technology in a low-temperature co-fired ceramic (LTCC) process for highly-integrated 60 GHz radios.
Abstract: This paper present a summary of the development of Antenna-in-Package (AiP) technology in a low-temperature co-fired ceramic (LTCC) process for highly-integrated 60-GHz radios The AiP exploits the LTCC capability to integrate the antenna and package functions into a compact three-dimensional structure of size 125×8×1265 mm3 The antenna consists of a radiator, a ground plane, and a guard ring It is shown that our AiP designs achieve excellent antenna performance in the 60-GHz band with an estimated efficiency better than 90% Simulated and measured impedance and radiation results are compared They agree reasonably well, indicating that the challenge in the antenna technology for low-power high-speed 60-GHz wireless communications has been solved

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, a 6GHz∼18GHz LNA MMIC (2×1mm2) is developed using a commercial GaAs pHEMT process and integrated into this novel and cost effective package solution.
Abstract: A potential large scale QFN package solution—plastic air-cavity QFN package, compatible with SMD assembly lines, for future low cost, miniature size and attractive performance microwave package application is proposed in this paper. A 6GHz∼18GHz LNA MMIC (2×1mm2) is developed using a commercial GaAs pHEMT process and integrated into this novel and cost effective package solution. The measured results (not de-embedded with test fixture) show that noise figure is less than 2.75dB, and input return loss is below 10dB, moreover small signal gain is more than 19.3dB and gain flatness is ±1.75dB with 4×4mm2 packaged area and DC power dissipation 120mW across 6GHz to 18GHz.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, a new wideband 180° microstrip phase shifter network on TP-2 is presented, which is composed of coupled lines and double 45° open and short stubs, which are shunted at the edge points of the main line respectively.
Abstract: A new wide-band 180° micro-strip phase shifter network on TP-2 is presented in this paper. The network is composed of coupled lines and double 45° open and short stubs, which are shunted at the edge points of the main line respectively. To demonstrate the design methodology, a new structure 180° phase shifter network, operated at 3.5∼5.5GHz, were designed and fabricated using the design graphs, and were experimented. The measured performances of the phase shifter network were well in agreement with the corresponding the simulation ones over the operating bands, and showed broadband phase characteristics.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, a miniaturized interdigital capacitor resonator (ICR) is proposed in the design of a new wide stopband microstrip bandpass filter, which has a curved geometry with small dimension, but with a large equivalent self-capacitance and higher spurious frequency.
Abstract: A miniaturized interdigital capacitor resonator (ICR) is proposed in the design of a new wide stopband microstrip bandpass filter. Such an ICR has a curved geometry with small dimension, but with a large equivalent self-capacitance and higher the first spurious frequency. Curved interdigital capacitor structure is introduced to captured larger equivalent self-capacitor. Meanwhile, interdigital capacitor structure is adopted to obtain strong coupling between ICRs to achieve wide bandwidth. The developed filter exhibits sharp skirt and wide stopband, with an excellent agreements obtained between its measured and simulated S-parameters.

Proceedings ArticleDOI
Jimmy Hsu1, Jack Lin2, Tung-Yang Chen1, Wei-Da Guo1, Sam Yang1, Renee Lee1 
01 Dec 2009
TL;DR: In this paper, the power distribution network (PDN) analysis, including chip, quad-flat-package (QFP) and two-layer board, was presented for the cost-effective system design in the high-speed IO application.
Abstract: The power distribution network (PDN) analysis, including chip, quad-flat-package (QFP) and two-layer board, was presented for the cost-effective system design in the high-speed IO application. The physical interaction between the high-inductive shared off-chip design and capacitive on-chip network was discussed to figure out the related potential issues, such as anti-resonance and the serious interference in PDN. Finally, the integrated analysis with frequency-dependent PDN characteristics, instead of the traditional complicated spice model, was analyzed and validated in the time domain to correlate with the simultaneously switching noise in the frequency domain finding.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, a process that allows customers to do IR drop analysis on the package/SiP and PCB level is introduced, where component information such as the package model, power consumption and voltage regulator module (VRM) as well as power delivery network circuit can be used at the package and board level to perform static IRDrop analysis.
Abstract: This paper introduces a process that allows customers to do IRDrop analysis on the package/SiP and PCB level. The component information such as the package model, power consumption and voltage regulator module (VRM) as well as power delivery network circuit can be used at the package and board level to perform static IRDrop analysis. The power consumption is used to obtain the current excitation while the VRM pins are used to provide the power supply. For the complicated package and PCB geometry structure, the progressive mesh scheme is used to extract the DC circuit model for their power delivery network. In order to meet the tolerance of current and voltage drop, the required VRM and IC components locations as well as stackup can be optimized according to the voltage drop in DC domain. The user can also view the voltage drop, current and temperature rise.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, a new finite-difference time domain (FDTD) method is proposed in order to eliminate the Courant-Friedrich-Levy (CFL) condition restraint.
Abstract: In this paper, a new finite-Difference Time-Domain (FDTD) method is proposed in order to eliminate the Courant-Friedrich-Levy (CFL) condition restraint This new algorithm is based on an alternating-direction explicit method This work is the first application of the Alternating-Direction Explicit (ADE) method to the FDTD method In this report, numerical formulations and some simulation results are presented Furthermore, the results by ADE-FDTD method are compared with the results by the conventional FDTD method As a result, it is confirmed that the proposed method is almost unconditionally stable and superior to the conventional one

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this article, the authors discuss electrical characterization of new developed hybrid package, FusionQuad, that is converging QFN and TQFP type package to have good electrical performance with high I/O pin counts.
Abstract: This paper discuss electrical characterization of new developed hybrid package, FusionQuad, that is converging QFN and TQFP type package to have good electrical performance with high I/O pin counts Precise electrical modelling from wire-to-motherboard is performed by using simple organic based test die with de-embedding technique to cope with limits of assembly process Measurements are done in the frequency domain to extract S-parameter up to 10 GHz

Proceedings ArticleDOI
Anping Zhao1
01 Dec 2009
TL;DR: It is found that both the patch and slot play an important rule in improving the impedance bandwidth of the antenna.
Abstract: In this paper, a wideband antenna for mobile terminal is proposed by using a unique direct feed approach. In particular, the approach consists of a cut, a patch and two vertical slots. It is found that both the patch and slot play an important rule in improving the impedance bandwidth of the antenna. An antenna prototype is made and good agreement between the simulated and measured is obtained. The measured impedance bandwidth of the antenna at −6dB level is from 0.78 to 3.95GHz, which is sufficient to cover most of the current radio systems.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, the mode analysis method has been proposed and model the precise FEXT waveform using this method, FEXT saturation phenomenon can be explained and the exact FEXT equations are proposed depending on the relationship between the velocity difference of even and odd modes and the initial rising time of the input step pulse.
Abstract: In this paper, the mode analysis method has been proposed and model the precise FEXT waveform Using this method, FEXT saturation phenomenon can be explained and the precise FEXT equations are proposed depending on the relationship between the velocity difference of even- and odd-mode and the initial rising time of the input step pulse Saturated FEXT level with increased duration were verified by the crosstalk simulation in two coupled microstrip-type transmission lines The modeled FEXT and TDT waveforms by the mode analysis method show a good correlation with the measured waveforms

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, an accurate FDTD-based method for analysis of time domain response of frequency-dependent lossy transmission lines driven by CMOS gates is introduced, where MOS transistors are modeled as the nonlinear alpha-power law model that includes the carriers' velocity saturation effect of short channel devices.
Abstract: This paper introduces an accurate FDTD-based method for analysis of time domain response of frequency-dependent lossy transmission lines driven by CMOS gates. MOS transistors are modeled as the nonlinear alpha-power law model that includes the carriers' velocity saturation effect of short-channel devices. The dynamic behavior of CMOS gates during switching is defined in seven operation regions. Skin effects of lossy transmission line are included in the proposed method and analyzed with FDTD. The proposed method is accurate by comparison between the numerical results of the proposed method and the simulation results of SPICE.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, the transmission line method was applied for analysis of a conventional electromagnetic bandgap (EBG) structure with arbitrary shaped power/ground plane, and the fast and accurate modeling by TLM showed the computationally efficient results with respect to full wave electromagnetic analysis.
Abstract: Transmission line method (TLM) is applied for analysis of a conventional electromagnetic bandgap (EBG) structure with arbitrary shaped power/ground plane. The fast and accurate modeling by TLM shows the computationally efficient results with respect to full-wave electromagnetic analysis. More-over it is shown that suppression bandwidth of a EBG structure can be easily analyzed by stepped impedance filter and the calculated bandwidth is identical to the measured.

Proceedings ArticleDOI
01 Dec 2009
TL;DR: In this paper, multi-physics characterization of multi-layered stacked through silicon vias (TSVs) is performed based on the hybrid time-domain finite element method (FEM), with most temperature-dependent material parameters treated appropriately.
Abstract: Multi-physics characterization of multi-layered stacked through silicon vias (TSVs) is performed based on the hybrid time-domain finite element method (FEM), with most temperature-dependent material parameters treated appropriately Using our developed algorithm, numerical computation is carried out so as to capture transient electro-thermo-mechanical responses of different TSV geometries injected by a periodic EMP, where the effects of thermal accumulation and induced thermal stress are predicted accurately and analyzed in detail The provided information will be useful for us to enhance TSV reliability