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European Microwave Integrated Circuit Conference 

About: European Microwave Integrated Circuit Conference is an academic conference. The conference publishes majorly in the area(s): Amplifier & CMOS. Over the lifetime, 624 publication(s) have been published by the conference receiving 3830 citation(s).

Papers published on a yearly basis

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Proceedings ArticleDOI
01 Oct 2008
Abstract: X-parameters, also referred to as the parameters of the Poly-Harmonic Distortion (PHD) nonlinear behavioral model, have been introduced as the natural extension of S-parameters to nonlinear devices under large-signal drive [1]-[3]. This paper describes a new approach to X-parameter characterization and nonlinear simulation - including large-signal experimental model validation - of a commercially available GSM amplifier. A specially configured Nonlinear Vector Network Analyzer (NVNA) and procedure for measuring, for the first time, X-parameters under pulsed bias conditions is presented. The measured pulsed bias X-parameters are then used with the PHD framework to enable accurate nonlinear simulation of device behavior, including harmonics (magnitude and phase) under pulsed bias large-signal conditions with mismatch. Independent NVNA measurements validate the predictions of the X-parameter simulations of output match under drive, and show the inadequacy of "Hot S22" techniques to predict such device performance.

46 citations

Proceedings ArticleDOI
01 Oct 2008
Abstract: Amplifiers for a next generation of T/R-modules in future active array antennas are realized as monolithically integrated circuits (MMIC) on the bases of novel AlGaN/GaN HEMT structures. Both, low noise and power amplifiers are designed for X-band frequencies. The MMICs are designed, simulated and fabricated using a novel via-hole microstrip technology. Output power levels of 6.8 W (38 dBm) for the driver amplifier (DA) and 20 W (43 dBm) for the high power amplifier (HPA) are measured. The measured noise figure of the low noise amplifier (LNA) is in the range of 1.5 dB. A T/R-module front-end with mounted GaN MMICs is designed based on a multilayer LTCC technology.

41 citations

Proceedings Article
01 Oct 2012
TL;DR: This paper describes a 120-GHz-band quadrature phase shift keying (QPSK) transmitter and receiver fabricated on microwave monolithic integrated circuits (MMICs) that can handle 20-Gbit/s data streams.
Abstract: This paper describes a 120-GHz-band quadrature phase shift keying (QPSK) transmitter and receiver fabricated on microwave monolithic integrated circuits (MMICs). The MMICs were fabricated using 0.1-µm-gate InP HEMTs and can handle 20-Gbit/s data streams. The transmitter MMIC consists of a QPSK modulator with direct modulation, differential amplifiers for data, a power amplifier, and an output-power monitor circuit. A differentially coherent detector, voltage-controlled phase shifter, and low-noise amplifier are monolithically integrated on a receiver MMIC. The QPSK transmitter and receiver MMICs were mounted in WR-8 waveguide modules to evaluate the data transmission performance. The bit error rate (BER) for 22.2-Gbit/s pseudorandom binary sequence (PRBS) 27−1 data is smaller than 10−10 at a receiver power of −35 dBm.

37 citations

Proceedings ArticleDOI
26 Dec 2007
Abstract: We developed a kW-class AlGaN/GaN HEMT pallet amplifier operating at S-band. The pallet amplifier consists of an internally partial-matched AlGaN/GaN HEMT optimized for S-band on a copper base with soft PC boards. The developed pallet amplifier showed excellent performance, which is output power of over 800 W, high linear gain of 13.6dB and high efficiency of 52% over the wide frequency range of 2.9-3.3 GHz, operating at 65 V drain voltage with the pulsed condition at a duty of 10% and a pulse width of 200 musec. With 80 V drain voltage operation the peak power reached to 1 kW with 49.5% drain efficiency and 14.1 dB linear gain at 3.2 GHz. To the best of our knowledge, this is the highest power pallet amplifier ever reported for S-band.

34 citations

Proceedings ArticleDOI
26 Dec 2007
Abstract: The design of a 60 GHz cascode amplifier in a 90 nm technology is described. The amplifier uses an interstage matching to increase the gain and to provide a better power match between the common-source and the common-gate transistor of the cascode device. Both the common-source and the common-gate transistor make use of an optimized round-table layout, which minimizes all terminal resistances and thus improves the mm-wave performance of the nMOS transistors. A record fmax of 300 GHz is achieved for a 40 mum round-table nMOS in 90 nm CMOS. The cascode amplifier achieves a gain of 7.5 dB at 60 GHz with a DC power consumption of only 6.7 mW. When compared to a shared-junction cascode amplifier or a two-stage common-source cascade amplifier, the presented cascode amplifier is favorable in terms of power gain and DC power consumption

27 citations

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No. of papers from the Conference in previous years