Showing papers presented at "European Microwave Integrated Circuit Conference in 2008"

X-Parameter Measurement and Simulation of a GSM Handset Amplifier

Abstract: X-parameters, also referred to as the parameters of the Poly-Harmonic Distortion (PHD) nonlinear behavioral model, have been introduced as the natural extension of S-parameters to nonlinear devices under large-signal drive [1]-[3]. This paper describes a new approach to X-parameter characterization and nonlinear simulation - including large-signal experimental model validation - of a commercially available GSM amplifier. A specially configured Nonlinear Vector Network Analyzer (NVNA) and procedure for measuring, for the first time, X-parameters under pulsed bias conditions is presented. The measured pulsed bias X-parameters are then used with the PHD framework to enable accurate nonlinear simulation of device behavior, including harmonics (magnitude and phase) under pulsed bias large-signal conditions with mismatch. Independent NVNA measurements validate the predictions of the X-parameter simulations of output match under drive, and show the inadequacy of "Hot S22" techniques to predict such device performance.

GaN MMIC based T/R-Module Front-End for X-Band Applications

Abstract: Amplifiers for a next generation of T/R-modules in future active array antennas are realized as monolithically integrated circuits (MMIC) on the bases of novel AlGaN/GaN HEMT structures. Both, low noise and power amplifiers are designed for X-band frequencies. The MMICs are designed, simulated and fabricated using a novel via-hole microstrip technology. Output power levels of 6.8 W (38 dBm) for the driver amplifier (DA) and 20 W (43 dBm) for the high power amplifier (HPA) are measured. The measured noise figure of the low noise amplifier (LNA) is in the range of 1.5 dB. A T/R-module front-end with mounted GaN MMICs is designed based on a multilayer LTCC technology.

High Power Microstrip GaN-HEMT Switches for Microwave Applications

Abstract: In this paper the design, fabrication and test of X-band and 2-18 GHz wideband high power SPDT MMIC switches in microstrip GaN technology are presented. Such switches have demonstrated state-of-the-art performances. In particular the X-band switch exhibits 1 dB insertion loss, better than 37 dB isolation and a power handling capability at 9 GHz of better than 39 dBm at 1 dB insertion loss compression point; the wideband switch has an insertion loss lower than 2.2 dB, better than 25 dB isolation and a power handling capability of better than 38 dBm in the entire bandwidth.

2-6 GHz GaN MMIC Power Amplifiers for Electronic Warfare Applications

Abstract: This paper presents two MMIC broadband high power amplifiers of 4 mm of periphery at the output stage in the frequency band 2-6 GHz. The amplifiers are based on Al-GaN/GaN high electron mobility transistor (HEMT) technology on SiC substrate. They have been fabricated in two different european foundries: SELEX Sistemi Integrati and QINETIQ. SELEX has a gate process technology of 0.5 mum, and devices of 10times100 mum periphery in microstrip technology and QINETIQ has a gate-length of 0.25 mum, and devices of 8times125 mum in coplanar technology. The coplanar amplifier from QINETIQ has demonstrated an output power of 8 W in continuous wave at Vds=20 V which confirm model predictions. On the other hand, SELEX microstrip amplifier has a saturation power of 10 W CW at Vds=25 V and 4 GHz. This amplifier measured on-wafer in pulsed conditions exhibits a maximum power of 17 W at Vds=30 V.

Impact of Si substrate resistivity on the non-linear behaviour of RF CPW transmission lines

Abstract: Non-linear behaviour of RF coplanar transmission lines is analyzed for various values of Si substrate resistivitiy Based on small-signal measurements performed under different DC bias conditions, voltage dependent capacitance and conductance per unit length of the transmission line are extracted and compared for several silicon substrates Harmonic distortion of large RF signal at 900 MHz along CPW lines is measured using a spectrum analyzer based setup as well as with a LSNA which gives us access to the phase of the harmonic components For an input power of +25 dBm, the highest harmonic component (2nd) is as high as -15, -57, -37 and -63 dBm for resistivity substrates of 20, 500, 5 k and 2 kΩ-cm, respectively A reduction of 45 and 15 dB for all harmonic components was obtained for the 5 and 2 kΩ-cm HR-Si substrates, respectively, when a trap-rich passivation layer was used at the Si/SiO2 interface, and for both characterization setups The impact of the resistivity value on signal distortion with its relation to the bias-dependence substrate characteristic and the efficiency of the trap mechanism of the passivation layer are for the first time introduced from experimental result considerations

AlGaN/GaN HEMT with over 110 W Output Power for X-Band

Abstract: AlGaN/GaN HEMT using field plate and recessed gate for X-band application was developed on SiC substrate. Internal matching circuits were designed to achieve high gain at 8 GHz for the developed device with single chip and four chips combining, respectively. The internally matched 5.52 mm single chip AlGaN/GaN HEMT exhibited 36.5 W CW output power with a power added efficiency (PAE) of 40.1% and power density of 6.6 W/mm at 35 V drain bias voltage (Vds). The device with four chips combining demonstrated a CW over 100 W across the band of 7.7-8.2 GHz, and an maximum CW output power of 119.1 W with PAE of 38.2% at Vds =31.5 V. This is the highest output power for AlGaN/GaN HEMT operated at X-band to the best of our knowledge.

Full W-Band High-Gain LNA in mHEMT MMIC Technology

Abstract: In this contribution the possible applications, technology, design and measurements of a W-Band high gain LNA are given. The main features of the four stage LNA can be summarised as following: a 25 dB average gain with plusmn2 dB ripple from 70 to 105 GHz, where gain is higher than 21 dB on the entire 70-110 GHz range. LNA predicted noise figure is 2.7 dB between 80 and 95GHz and less than 3.2 dB up to 108 GHz while the chip's power consumption is 35 mW. The technology used is a 70 nm GaAs mHEMT process from OMMIC.

A Low-Power Ultra-Compact CMOS LNA with Shunt-Resonating Current-Reused Topology

Abstract: A low-power ultra-compact CMOS low-noise amplifier (LNA) in a shunt-resonating current-reused topology is presented. The common-source transistors are connected with a shunt-resonating inter-stage match network such that the bias current is shared to have low power consumption and RF signal is doubly amplified to have high gain and low noise figure. The implemented 0.18 mum CMOS LNA achieves 15.2 dB power gain and 3.0 dB noise figure, while only consuming 1.81 mW. Compared with previously published current-reused LNA, the proposed LNA has smallest chip size of 0.28 mm2, excluding the I/O pads, and the highest FOM of 2.77.

A 20GS/s 8-Bit Current Steering DAC in 0.25μm SiGe BiCMOS Technology

Abstract: This paper presents the design of an 8-bit 20 GS/s DAC. The DAC is implemented with a modified current steering architecture where unlike the conventional binary weighted architecture a R-2R ladder DAC architecture is used as the LSB sub-DAC. In simulation the 8-bit DAC shows 7.83 ENOB for 9 GHz of input sinusoidal at 20 GHz of sampling rate with the power dissipation of 2.5 W. The measurement results of the 4-bit LSB sub-DAC show that the sub-DAC can work up to 30 GHz with a power dissipation of 455 mW.

Metamorphic MMICs for Operation Beyond 200 GHz

Abstract: In this paper, we present the development of advanced millimeter-wave and submillimeter-wave monolithic integrated circuits for use in active and passive high-resolution imaging systems operating beyond 200 GHz. A 210 GHz subharmonically pumped dual-gate field-effect transistor (FET) mixer has been successfully realized using our 100 nm InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor (mHEMT) technology in combination with grounded coplanar circuit topology (GCPW). Furthermore, a G-band low-noise amplifier MMIC demonstrating a linear gain of more than 16 dB between 180 and 220 GHz and a state-of-the-art noise figure of 4.8 dB was fabricated using a gate length of 50 nm. Finally, a submillimeter-wave monolithic integrated circuit (S-MMIC) could be realized based on an advanced 35 nm mHEMT technology, offering a small-signal gain of more than 15 dB between 270 and 310 GHz.

A Survey on 60 GHz Broadband Communication: Capability, Applications and System Design

Abstract: This paper gives a review of important aspects and current developments in 60 GHz broadband communication. We present channel measurement results for a conference room and analyze the channel capacity. The results clearly demonstrate the capability of the 60 GHz approach. Finally, we outline a concept for a wireless 60 GHz in-flight entertainment system.

X-Band GaN SPDT MMIC with over 25 Watt Linear Power Handling

Abstract: Single pole double throw (SPDT) switches are becoming more and more key components in phased-array radar transmit/receive modules. An SPDT switch must be able to handle the output power of a high power amplifier and must provide enough isolation to protect the low noise amplifier in the receive chain when the T/R module is transmitting. Therefore gallium nitride technology seems to become a key technology for high power SPDT switch design. The technology shows good performance on microwave frequencies and is able to handle high power. An X-band SPDT switch, with a linear power handling of over 25 W, has been designed, measured and evaluated. The circuit is designed in the coplanar waveguide AlGaN/GaN technology established at QinetiQ.

A 40-to-76 GHz Balanced Distributed Doubler in 0.13-μm CMOS Technology

Abstract: A miniature 40- to 76-GHz monolithic balanced distributed frequency doubler is developed in a commercial 0.13-mum CMOS process. This balanced doubler consists of a reduced-size broadside-coupled Marchand balun and two distributed doublers, and suppresses fundamental signals better than 25 dB. The measured conversion losses are 8-11 dB for the output frequencies from 40 to 76-GHz under 6-dBm input drive, with a low dc power consumption of 12 mW. The chip size is 0.64 times 0.65 mm2. To the best of our knowledge, this doubler achieves the widest bandwidth among all the CMOS doublers reported to date.

On-Chip S-Shaped Rat-Race Balun for Millimeter-Wave Band Using Wafer-Level Chip-Size Package Process

Abstract: In millimeter-wave CMOS circuits, a balun is useful for connecting off-chip single-end devices and on-chip differential circuits to improve noise immunity. However, an on-chip balun occupies large chip area. To reduce the chip area required for the on-chip balun, a new rat-race balun using rewiring technology with a wafer-level chip-size package (W-CSP) is proposed. The W-CSP balun occupies no area in a die because it is placed over integrated circuits. In the proposed balun, an S-shaped structure is adopted in order to directly connect the balun to differential GSGSG pads on a chip with small area. The S-shaped W-CSP balun was fabricated on a silicon-on-insulator (SOI) substrate. The core area of the S-shaped rat-race balun is 480 mum times 735 mum, which is 22.4% that of a square rat-race balun. As a result of measurement, we found that the minimum insertion loss is 1.7 dB and the operating frequency range is 40 to 61 GHz.

Industrial MHEMT Technologies for 80 - 220 GHz Applications

Abstract: This paper describes the industrial development methodology of a family of MHEMT technologies with gate lengths from 130 down to 50 nm. State of the art MMIC LNA performance for the commercial 70 nm technology at 90 and 150 GHz is presented.

Analysis and Design of a 50-GHz 2:1 CMOS CML Static Frequency Divider Based on LC-tank

Abstract: In this paper, a 2:1 current model logic (CML) frequency divider operating at frequencies up to 50 GHz is reported. A novel circuit topology is employed, which consists of the conventional CML structure with LC-tank components as the output load of the divider. An analytical model of the proposed frequency divider is developed and a new method is presented to estimate the divider's performance. The proposed CML frequency divider contains four spiral inductors and is fabricated on standard 130-nm CMOS technology. The division range of the proposed divider was measured from 30 GHz to 50 GHz with 11.7 mW power dissipation at a 1.5-V supply voltage.

A 60 GHz SiGe HBT Chip Set

Abstract: A 60 GHz SiGe HBT chipset for high speed wireless communication systems has been developed. The functionalities of LNA, up-converter, down-converter and PA have been realized with good performance. Design strategy, achieved results and comparison with state-of-the-art work will be presented. The work proves that single chip integration of the whole 60 GHz RF-frond-end will be possible using silicon based technologies.

DC-Contact RF MEMS Switches using Thin-Film Cantilevers

Abstract: This paper describes the development of DC-contact RF-MEMS SPST, SP3T, and SP4T switches implemented with a thin-film cantilever. Using aluminium as the sacrificial layer in the fabrication process, flat cantilevers are realized with a measured actuation voltage of 50~70 V. The SPST switch is used as a building block to realize more complicated SP3T and SP4T switches for use in true-time delay phase shifters. The preliminary measurements of the SP3T and SP4T switches demonstrate isolation of 20 dB and insertion loss less than 2 dB up to 50 GHz.

Wideband CMOS LC VCOs for IEEE 802.15.4a Applications

Abstract: Two wideband LC VCOs, customized for IEEE 802.15.4a applications, are presented in this paper. Both circuits have been designed and implemented in a 90-nm CMOS technology. The first VCO has been designed for the 3.1-5 GHz UWB band. It exhibits a tuning range of 40% from 3.2 GHz to 4.8 GHz with a tuning voltage of 1.2 V. The measured phase noise at 1-MHz offset from a 4-GHz carrier is -114 dBc/Hz. The 4-GHz VCO current consumption is only 1.5 mA from a 1.2-V supply voltage. The second VCO represents an improved design intended for the 6-10 GHz frequency operating range. By exploiting differentially tuned varactors, the proposed 8-GHz VCO is able to guarantee a 45% tuning range and a phase noise at 1-MHz offset frequency lower than -102 dBc/Hz. The 8-GHz VCO draws 2.6 mA from a 1.2-V supply voltage.

High Voltage RF LDMOS Technology for Broadcast Applications

Abstract: We present high voltage (40-50V) RF LDMOS technologies to realize 300-500 W power levels for frequencies up to 1.0 GHz. This technology has an extremely good ruggedness, one octave wide band operation, and reliable circuit matching.

Heterostructure Barrier Varactor Quintuplers for Terahertz Applications

Abstract: We present progress and status of heterostructure barrier varactor quintupler sources for 170 GHz and 210 GHz (G-band) The source modules feature an ultra-compact waveguide block design, and a microstrip matching circuit on high-thermal-conductivity AlN to improve the power handling capability Furthermore, we present progress on design and fabrication of integrated HBV circuits for terahertz applications

Efficient AlGaN/GaN HEMT Power Amplifiers

Abstract: This paper describes efficient GaN/AlGaN HEMTs and MMICs for L/S-band (1-4 GHz) and X-band frequencies (8-12 GHz) on three-inch s.i. SiC substrates. Dual-stage MMICs in microstrip transmission-line technology yield a power-added efficiency of ?40% at 8.56 GHz for a power level of ?11 W. A single-stage MMIC yields a PAE of ?55% with 6 W of output power at VDS= 20 V. The related mobile communication power HEMT process yields an average power density of 10 W/mm at 2 GHz and VDS= 50 V. The average PAE is 61.3% with an average linear gain 24.4 dB and low standard deviation of all parameters. The devices yield more than 25 W/mm of output power at 2 GHz when operated in cw at VDS= 100 V with an associated PAE of ?60%. The GaN HEMT process with 0.5 ?m gate-length yields an extrapolated lifetime of 105 h when operated at VDS= 50 V at a channel temperature of 90°C. When operated at 2 GHz devices with 480 ?m gate-width yield a change of the RF power-gain of less than 0.2 dB under high gain-compression at VDS= 50 V and a channel temperature of 250°C.

S-Band AlGaN/GaN Power Amplifier MMIC with over 20 Watt Output Power

Abstract: This paper presents the design of an S-band HPA MMIC in AlGaN/GaN CPW technology for radar TR-module application. The trade-offs of using an MMIC solution versus discrete power devices are discussed. The MMIC shows a maximum output power of 38 Watt at 37% Power Added Efficiency at 3.1 GHz. An output power of more than 20 Watt has been simulated from 2.5 to 3.7 GHz. The robustness against high output VSWR values up to 4:1 has been checked and simulations show a maximum drain-gate voltage of around 60 V.

Miniaturized Multilayer CPW pHEMT Amplifiers

Abstract: Compact pHEMT amplifiers, which are composed of newly developed miniaturized multilayer inductors and capacitors, have been designed, fabricated and characterised. Their measured performances are presented and compared with those of amplifiers composed of conventional planar components. The results show that multilayer technology reduces the size of the amplifiers by approximately 50% while maintaining the same performance. In this paper we demonstrate that the developed compact components are integrated with pre-fabricated GaAs pHEMTs to form 3D MMICs providing excellent performance and space saving resulting in low cost manufacturing of future MMICs.

Integrated Schottky Structures for Applications Above 100 GHz

Abstract: Recent developments in the fabrication of GaAs integrated Schottky structures for applications above 100 GHz are presented. Two approaches are discussed; the fabrication of integrated circuits using a GaAs foundry service, coupled with the research based post-processing of these structures, and the fabrication of discrete and integrated Schottky structures using a bespoke research laboratory.

The Impact of Technology Node Scaling on nMOS SPDT RF Switches

Abstract: This work presents a comparison of three single-pole double-throw (SPDT) nMOS RF switches implemented in commercially available Si-based 180, 130, and 90 nm technologies. In addition, a new series-shunt switch is presented that offers a means to improve switch isolation. Measured results of these RF switches demonstrates how technology node scaling impacts RF switch design and provides insight into the complicated trade-offs between insertion loss, isolation, and linearity.

Gate Width Dependence of Noise Parameters and Scalable Noise Model for HEMTs

Abstract: Explicit expressions describing the gate width dependences of HEMTs noise parameters have been obtained experimentally. The minimum noise figure and optimum source admittance are proportional to gate width, and noise resistance is inversely proportional to gate width. A scalable noise model is then developed, which accurately predicates noise parameters in a broad gate width range. The scalable noise model can be attached to any nonlinear signal model to predicate both noise and nonlinear signal responses.

60 GHz Frequency Conversion 90 nm CMOS Circuits

Abstract: This paper presents design and a characterisation of an active single-stage single-ended 30 to 60 GHz frequency doubler and a resistive down conversion mixer with differential buffer stage. These MMICs are realised using 90-nm CMOS process. The doubler exhibit 7.1 dB conversion loss and 10.8 dB fundamental frequency suppression with 0 dBm input power and 13.7 mW power consumption. Maximum output power of -4.2 dBm is achieved with 5 dBm input power. The mixer has 9.8 dB conversion gain with +5 dBm local oscillator level. The compression point P1dB is -2 dBm with 14 mW power consumption.

A Low-voltage, Fully-integrated (1.5-6) GHz Low-Noise Amplifier in E-mode pHEMT Technology for Multiband, Multimode Applications

Abstract: This paper describes the design and implementation of a fully-integrated MMIC low-voltage, low-noise amplifier (LNA) for use in multimode, multiband receivers using 0.25 um enhancement-mode GaAs pHEMT technology. The LNA has two cascaded gain stages and is fully usable down to 0.8 V supply voltage and 5 mA total current drain. Power supply inductors, bypass capacitor and interstage matching are integrated on the die. An external inductor can be added to improve input match and gain. At 1.4 V supply, it achieves broadband (1.5-6)GHz gain of 17.5 dB and typical noise figure of 1.5 dB while consuming 18 mA of total current. Gain variation is typically less than 1.5 dB. Input IP3 is better than -4 dBm across the band. The complete chip occupies an area of 1.1 mm2.