Showing papers presented at "International Meeting for Future of Electron Devices, Kansai in 2004"

Laser terahertz emission microscope for inspecting electrical failures in integrated circuits

Abstract: The inspection and fault analysis of semiconductor devices has become a critical issue with increasing demands for quality and reliability in circuits as stated in L. A. Krauss et al. (2001), K. Nikawa (2002) and K. Nikawa et al. (2003). Recently, we have developed a laser-terahertz (THz) emission microscope (LTEM) that can be applied for the noncontact and nondestructive inspection of the electrical faults in circuits presented in K. Nikawa et al. (2003). The LTEM can image the amplitude profile of the THz wave emitted by scanning the sample with femtosecond (fs) laser pulses. The amplitude of the THz emission generated by the transient photocurrent is proportional to the local electric field at the laser-irradiated area according to T. Kowa et al. (2003). Therefore, the LTEM image of the semiconductor device while it operates reflects the electric field distribution in the chip. By comparing the LTEM image of a damaged chip with that of a normal one, we can localize the electrical faults. In this work, we report experimental results on a biased 8-bit microprocessor, as well as unbiased MOSFETs embedded in a test element group (TEG).

Fault location using electron beam current absorbed in LSI interconnects

Abstract: This paper introduced the developed apparatus named electron beam absorbed current (EBAC) to locate fault sites in LSI interconnects. This technique has a potential to become an effective tool and is driven forward to extended applications.

State-of-the-art wide band-gap semiconductors for power electronic devices

Abstract: In this paper, state-of-the-art wide band-gap semiconductors is described mainly for SiC considering the application for power electronic devices including some of nitride-based devices.

Reduction of ohmic contact resistance of AlGaN/GaN HFETs by doping of thermally diffused Si

Abstract: Low ohmic contact resistance is crucial to realization of good RF and power performances of AlGaN/GaN heterojunction field effect transistors (HFETs). However, with almost universal use of Ti/Al based electrode, usual specific contact resistance (pc) remains only at 1 /spl times/ 10/sup -5/ /spl Omega//spl middot/cm level which is insufficient for the ultimate goal of exceeding the performances of the GaAs based FETs. Therefore, in order to overcome the very high potential barrier of AlGaN, a more aggressive method is required. In this work, we report on a simple but very effective method to reduce the contact resistance by thermal diffusion of Si dopants selectively into the area underneath the contact electrodes. By diffusing Si from the AlGaN surface at 1000/spl deg/C for 30 minutes, a record low /spl rho//sub c/ of 1.2 /spl times/ 10/sup -6/ /spl Omega//spl middot/cm/sup 2/ is realized.

Near infrared intersubband transitions in delta-doped InAs/AlSb multi-quantum wells

Abstract: Recently, the development of a compact light source operating in terahertz (THz) frequency range has attracted great amount of interest. Our goal is to realize all optical light sources pumped by a compact near infrared diode laser. For this purpose, we investigate intersubband transitions (ISBTs) in InAs/AlSb multiple quantum wells (MQWs). The family of semiconductors with a lattice constant of around 6.1 /spl Aring/ (InAs, AlSb, and GaSb) has several advantageous features such as the large conduction band discontinuity of about 2.1 eV and small effective mass in InAs leading to strong ISBTs. Previously, we studied the ISBTs in unintentionally doped InAs/AlSb for relatively wide wells and reported that no ISBTs were observed for well width less than 5 nm. Ohtani et al. reported ISBTs can be observed in narrower (2.7 nm) InAs/AlSb MQWs. In order to observe ISBTs in near infrared region, we investigate heavily doped InAs/AlSb MQWs with the well width, d, less than 5 nm.

Modeling of octagonal spiral inductors for integrated circuit applications

Abstract: As a need of embedded passive components is rising with the demand of small on-chip integrated circuit (IC) components, on-chip spiral inductor has become one of the key elements in IC designs according to S. Jenei et al. (2002). In this paper, modeling of octagonal spiral inductors with different number of turns is investigated.

Impact of boron penetration from S/D-extension on gate leakage current and gate-oxide reliability for 65-nm node CMOS and beyond

Abstract: For scaled CMOSFETs, it becomes much more difficult to ensure sufficient reliability of gate-oxide film, since power supply voltage is not scaled proportionally with gate-oxide. As well as the increase of the electrical stress that put on the gate-oxide, miniaturization effect should be cared. This paper demonstrates the performance of 65-nm node CMOSFETs, focused on gate oxide reliability, which is found to become crucial issue for short-channel pMOSFETs. Boron penetration from S/D-extension is found to increase gate leakage current and degrade gate oxide integrity. Fabrication process that suppresses the boron penetration is discussed, and optimized transistor characteristics for low operational power (LOP) and low standby power (LSTP) devices are presented.

Algorithm for low energy writing in nonvolatile memory

Abstract: Flash memories are most popular nonvolatile, low cost and high density memories. However, one of problems in the flash memory is large consuming energy for writing the data. Then, we proposed a novel coding algorithm for reduction of the consuming energy and confirmed the effect of the algorithm with the numerical simulations.

A CMOS transmitter for short-range wireless communication using ASK/CDMA technique

Abstract: A transmitter for short-range wireless chip-to-chip data communication system is described. The ASK/CDMA technique is applied for the purpose of compactness and high noise/interference tolerance in multiple access. The transmitter fabricated in 0.25-/spl mu/m CMOS technology has the chip size of 1.26 mm by 1.1 mm including probing pads arid consumes 62.5 mW at 2.5 V supply voltage. The fabricated transmitter shows the output power of -29 dBm at the carrier frequency 12.78 GHz modulating 7.35 Mbps data with 31 lengths of PN sequence.

Body bias controlled SOI technology with HTI

Abstract: As the LSI process technology advances, increase of power consumption for the LSIs becomes major issue because of number of transistors and clock frequencies increase. For a reduction of the power consumption of the LSI, lowering supply voltage technology is one of the effective ways such as applying a dynamic threshold voltage (DT) structure as stated in J. P. Colinge (1987). However, a DT SOI MOSFET with T-shape or H-shape gates has disadvantages of area penalties and a gate parasitic capacitance increase. In this paper we describe actively body-bias controlled (ABC) SOI MOSFET technology with hybrid trench isolation (HTI) based in Y. Hirano et al. (2000). This structure doesn't need the T or H gates and realizes low-voltage and high-speed operation with controlling a body potential.

Quantum-mechanical enhancement of short-channel effects in ultra-thin SOI MOSFETs

Abstract: In summary, in ultra-thin SOI MOSFETs, the DIBL was suppressed, while the charge-sharing effects are enhanced with distinct QMEs. Influences of distinct QMEs on drivability are the remaining issues.

Reliability testing of InGaAs mesa stucture waveguide photodiodes for 40-Gb/s optical receiver applications

Abstract: As a summary, the reliability testing of mesa InGaAs WGPDs from the viewpoint of evaluation long-term reliability has been investigated using the accelerated life tests. From the reliability testing results, it was found that the WGPD structure yielded devices that exhibited the median lifetime of much longer than 106 h at practical use conditions. Consequently, this WGPD structure has sufficient characteristics for practical 40-Gb/s optical receiver modules.

Effect on the electrical properties of HfO/sub 2/ films grown by metal-organic molecular beam epitaxy

Abstract: The characteristics of the HfO/sub 2/ dielectric layer on the p-type Si substrate by MOMBE process have been investigated. The electrical properties, surface morphology, and relative concentration of HfO/sub 2/ films could be tuned by O/sub 2//Ar ratio.

Physics-based analytical model of quantum-mechanical electron wave function penetration into thin dielectric films for capacitance evaluation

Abstract: Recently, quantum-mechanical (QM) effects in MOSFETs have been studied extensively to overcome predicted performance limitation as stated in G Timp et al (1999) and A Pacelli et al (1999) In MOS structures with a thin gate SiO/sub 2/ film, the dark-space near the Si/SiO/sub 2/ interface influences capacitance-voltage (C-V) characteristics as presented in A Shimizu et al (2001) In addition, it is reported that the electron penetration influences C-V characteristics in case of high impurity density based in S Mudanai et al (2001) So, simulations should consider several QM effects Unfortunately, generally speaking, recent numerical calculations including quantum effects spend a long time to get results In this paper, we derive exact analytical equations or more precise approximation for electron distribution functions We examine applicability of proposed expressions to C-V analysis

Wafer mapping of bulk traps in silicon using scanning capacitance transient spectroscopy

Abstract: In this paper, we report a newly developed scanning capacitance transient spectroscopy (SCTS) that enables the electrical characterization of semiconductor wafers by contactless and nondestructive fashion. The validity of the developed system has been demonstrated using a partially Au-doped Si wafer.

Plasma nitridation of gate insulator on 4H-SiC

Abstract: 4H-SiC is an attractive wide bandgap semiconductor for power MOS devices due to its excellent physical properties and availability of SiO/sub 2/ by thermal oxidation. However, a lot of interface states at SiO/sub 2//4H-SiC particularly near the conduction band edge are still a big problem for realization of high performance 4H-SiC MOS devices. Recently nitridation of gate SiO/sub 2/ by NO or N/sub 2/O gases at high temperatures has been reported for improvement of interface properties (Jamet et al., 2001). We have also showed improved interface properties by irradiating electrically neutral nitrogen radicals to thin SiO/sub 2/ (6nm) at 600/spl deg/C (Maeyama, 2003). To enhance nitridation for thicker SiO/sub 2/, we have tried plasma nitridation, in which SiO/sub 2/ was directly exposed in RF nitrogen plasma to enhance nitrogen incorporation at the interface.

Neural network based modeling for the growth rate of ZnO thin films on the pulsed laser deposition

Abstract: In this study the D-optimal design was used to make design matrix in this experiment. Neural networks (NNets) based on the backpropagation (BP) algorithm are applied to the pulsed laser deposition (PLD) process modeling in order to construct the model for the growth rate of the ZnO thin films.