Showing papers presented at "International Meeting for Future of Electron Devices, Kansai in 2012"

Junctionless transistors

Abstract: This paper describes the physics and basic properties of junctionless transistors. These FETs are less subject to short-channel effects than devices with junctions, including excellent subthreshold slope and DIBL.

Recent progress of Germanium MOSFETs

Abstract: This paper overviews the present status of Ge MOSFET technology, particularly focusing on n-FETs in terms of materials science of GeO 2 /Ge gate stacks and inversion layer mobility, and then discusses future prospects and fundamental challenges from the viewpoint of new types of Ge FETs.

Implantable CMOS biomedical devices

Abstract: This paper reviews recent results for implantable CMOS imaging devices applied to biomedical applications. The topics include retinal prosthesis devices and deep-brain implantation devices for small animals. Device structures and their characteristics are described, and the results of in vivo experiments are mentioned.

Circuit characteristic analysis considering NBTI and PBTI-induced delay degradation

Abstract: Bias Temperature Instability (BTI) becomes one of the most important reliability issues for nanometer process devices. We focus on aging degradation by BTI because it is known as one of the dominant factor that determines life time of circuits. In this paper, we show circuit delay degradation characteristic of BTI using the circuit simulation. The delay increase 15% after 10 years stress.

Breakdown characteristics in AlGaN/GaN HEMTs with multi-field-plate structure

Abstract: We have fabricated AlGaN/GaN high electron mobility transistors (HEMTs) with a multi-field-plate structure. An enhanced breakdown voltage was achieved by introducing a multi-field-plate to a conventional HEMT structure. This is the first report demonstrating enhanced breakdown characteristics by applying a bias voltage to the field-plate.

Fabrication of nano-patterns using quick gel-nanoimprint process

Abstract: We investigated a quick patterning using gel-nanoimprint process for zinc oxide (ZnO) thin films. The X-ray diffraction measurement revealed that the ZnO films had wurtzite structure by annealing in the ambient air or oxygen. The ZnO film annealed in oxygen exhibited higher refractive index of 1.92 (at 720 nm for wavelength of light) which is close to that of a conventional ZnO film, whereas that of ZnO film annealed in air atmosphere provided very low value of 1.64. The width of ZnO patterns was in good agreement with that of a polydimethylsiloxane mold.

High-resistance ZrN thin film resistor for small and low-cost MMIC switch

Abstract: GaAs monolithic microwave integrated circuit switch (MMIC SW) for cellular phones and WLAN are required to be smaller. The chip size can be smaller using a high-resistance thin film resistor (HR-TFR) because the resistance of the gate-resistor for the SW is very large. ZrN is thought to be one of the most promising materials for HR-TFRs. However, the ZrN TFRs have a thermal stability problem. In this study, we investigated the effect of thermal annealing on the ZrN film to improve the thermal stability. We found oxidized bumps in the ZrN TFR that are formed at the contact edge between the ZrN TFR and the electrode reduced the stability of the ZrN TFR. With an appropriate annealing condition, these oxidized bumps are suppressed and the stability of the ZrN TFR is improved. We developed a stable HR ZrN TFR of approximately 4000Ω/sq. to fulfill design requirements. We made the chip about 30% smaller in case of a single pole double throw (SPDT) MMIC SW for WLAN applications with the ZrN TFR.

Toward full fluctuation analysis of small FETs

Abstract: We, for the first time, estimate total fluctuation resulting from random dopants, interface traps and work functions using experimentally calibrated 3D statistical device simulation on 16-nm-gate high-κ/metal gate planar and bulk FinFET devices. The total full 3D simulated threshold voltage fluctuation (σV th ), induced by the aforementioned random sources simultaneously, is different from their statistical total sum because the assumption of independently and identically distributed random variables is invalid owing to strong surface potential's interactions among them. Structural innovation using bulk FinFET implies significant fluctuation suppression, which is about 45.6% reduction on σV th . 3D vertical channel-based device provides good capability in fluctuation reduction, compared with process efforts on low interface trap density (e.g., D it is below 1011 eV−1 cm−2) and small grain size (e.g., 1×1 nm2) of metal gate on planar one.

Graphene-based electro-optical modulator: Concept and analysis

Abstract: We propose and analyze an electro-optical modulator based on a gated graphene structure and utilizing the electrically-controlled Pauli blocking. It is demonstrated that the resonant excitation of plasma oscillations can lead to a substantial enhancement of the modulation efficiency in the terahertz range of modulation frequencies.

Low power and more accurate temperature sensor with an integrated dual slope AD converter

Abstract: A digital temperature sensor with an integrated dual slope ADC is recently proposed. In the present study, a smaller digital temperature sensor is realized by integrating a dual-slope capacitor, which is usually attached to an integrated circuit device. A proper designed circuit can supply a voltage of 2.3 V and a consumption current of 50 μA. Adopting the CV characteristics of the MOS capacitor allows the sensing accuracy to be improved by 0.5°C

Highly reliable low power solid-state drives (SSDs)

Abstract: SSDs and emerging storage class non-volatile semiconductor memories such as PCRAM, FeRAM, RRAM and MRAM have enabled innovations in various nano-scale VLSI memory systems for personal computers, multimedia applications and enterprise servers [1,2]. This paper provides a comprehensive review on various state-of-the-art memory system architectures and related memory circuits for the green high performance computing.

Essence and technology direction of ADC design

Abstract: This paper reviews and discusses an essence and the technology direction of ADC design from the point of view of conversion energy. Conversion energy of a high resolution ADC is reaching the theoretical limit, however there is still a large gap for a low resolution ADC. SAR ADC is the most energy efficient ADC and further energy reduction is possible to optimize the supply voltage. Conversion energy of a flash ADC can be reduced by reducing the transistor size and supply voltage. FD product is proposed to find the balance between the conversion energy and the conversion speed.

Rectification effects in ZnO-based transparent self-switching nano-diodes

Abstract: We report on the fabrication and characterization of the self-switching nano-diodes using zinc oxide films grown on glass substrates for use as transparent rectifiers. Diode-like characteristics were clearly observed. The current clearly increased with increases in the channel length and the turn-on voltage sifted toward zero volt with decreasing the channel width. Overall, we found that the rectifying characteristics can be controlled by the device geometry. The rectifying characteristics were further investigated by reducing the electron concentration. Although the current value decreased as a result of the to reduction in the electron concentration, it was found that rectifying characteristics, in particular the turn-on voltage, can be controlled by the electron concentration.

118GHz CMOS amplifier with group delay variation of 11.2ps and 3dB bandwidth of 20.4GHz

Abstract: In this paper, we report the design of an amplifier with a flat group delay and gain for use in a high-speed D-band wireless transceiver without a group delay equalizer. Compared with a conventional amplifier with a group delay equalizer, the amplifier have achieved a decrease in the power consumption and an increase in the communication speed. The peak gain is 8.1dB at 118.6GHz with a power consumption of 19.8mW. The 3dB bandwidth is 20.4dB with a group delay variation of 43.3 to 65.8ps.

Effects of ohmic metal thickness on drain current capability of AlGaN/GaN HEMTs

Abstract: This paper describes fabrication and characterization of AlGaN/GaN HEMTs for large current operation. By depositing a 1000nm-thick Au metal on Ti/Al/Mo/Au source and drain ohmic contacts, a drain current of more than 4 amperes has been achieved with a total gate width of 10 mm. We discuss the dependence of saturation drain current on gate width in terms of Au thickness and source/drain ohmic electrode width.

TEM observation of directly bonded interface between Si and SiC

Abstract: We developed an engineered wafer, a Si-on-SiC wafer, in which a Si wafer is directly bonded to single-crystalline 6H-SiC. A remarkable improvement in heat dissipation performance and a 60% reduction in the self-heating effect of Si MOSFET were demonstrated in Si-on-SiC wafer. In this work, Si/SiC directly bonded interface of Si-on-SiC wafers by transmission electron microscope (TEM).

Analysis of electron traps in SiO 2 /IGZO interface by cyclic capacitance-voltage method

Abstract: SiO 2 /IGZO interface was investigated by cyclic capacitance-voltage method. High pressure water vapor annealing improved interface states. We consider that this measurement method is useful for evaluating interface characteristics.

Process variation compensation with effective gate-width tuning for low-voltage CMOS digital circuits

Abstract: Recently, as CMOS devices become smaller, process variation, especially threshold voltage variation, significantly influences circuit characteristics under lower supply voltage. This paper proposes a process variation compensation technique with effective gate-width tuning as well as body biasing.

Improvement of drain leakage current characteristics in metal-oxide-semiconductor-field-effect-transistor by asymmetric source-drain structure

Abstract: This paper is on the comparison of drain leakage current in asymmetric source-drain (ASD) MOSFET using only lightly doped drain (LDD) on drain side versus symmetric source-drain (SSD) MOSFET using LDD and deep diffusion doping on drain side. We used long-channel devices so as to avoid any leakage associated with short-channel effects. Therefore, junction leakage and gate-induced-drain-leakage (GIDL) current are only considered. The band-to-band tunneling model is used to fit the measured drain leakage currents. Measurement results show that the drain leakage current is less in ASD MOSFET. For the ASD MOSFET, junction leakage current is dominant. For the SSD MOSFET, junction leakage current is still dominant in the low drain-to-gate voltage region. However, GIDL current is dominant in the high drain-to-gate voltage region. The GIDL current is more sensitive for interface trap generated by hot-carrier injection than junction leakage current. The plotting curves of band-to-band tunneling are more different in SSD MOSFET than ASD MOSFET. Thus, ASD MOSFET is superior in leakage-side.

Highly reliable a-InGaZnO thin film transistors with new SiN x gate insulators

Abstract: We fabricated highly reliable a-InGaZnO thin film transistors (TFTs) with new silicon nitride (SiN X ) gate insulator (GI) fabricated at low temperature (150°C). This new SiN X layer has low hydrogen content which is controlled by the source gases. Hydrogen gas flow rate ratio to SiF 4 was changed as 0%, 1%, and 8%, but the bias-stress-induced threshold voltage instabilities on the three kinds of TFTs kept quite low value. We found that the improvement for threshold voltage instabilities was not due to the effect of the hydrogen content. It is assumed that fluorine in the film, which originates in the source gas, has possibility to improve the interface between the channel and GI.

Electroless deposition of barrier and seed layers for via last Cu-TSV metalization

Abstract: We formed conformal diffusion barrier in a high aspect ratio through-silicon via using electroless plating. Dense adsorption of a Pd nanoparticle catalyst on SiO 2 assisted the formation of a thin electroless Co-W-B layer, and electroless Cu seed layer could be deposited on it. The adhesion strength of a Co-W-B film was enhanced by reducing the film thickness, and the maximum value was obtained at a thickness of 20 nm. The Co-W-B layer showed good barrier property against Cu diffusion to SiO 2 after annealing at 300°C, although a slight diffusion of Pd atoms in Cu was observed.

Dependence of semiconductor nanoparticle size on spray condition in electro-spray deposition method

Abstract: Semiconductor nanoparticles whose sizes were below 10 nm were fabricated by electro-spray deposition (ESD) method for a simple and dry printing process. We evaluated the particle size relation with the spray conditions. We found that the ZnS particle sizes were related with the solution flow rate. Calculated particle diameter from semi-theoretical analysis corresponded well with the experimental results. The minimum particle size reached to 9.8 nm. These results indicated the controllability of particle diameter by the spray condition and the possibility of the spray process to produce nanoparticles which exhibits the quantum confinement effect.

80GHz 12.2mW p-MOS cross-coupled CMOS LC oscillator

Abstract: To improve the power efficiency, we propose a cross-coupled CMOS LC-oscillator using a p-MOS instead of an n-MOS. As a result, an LC oscillator with an operating frequency of 80GHz and a power consumption of 12.2mW was realized using a 65nm 1P12M CMOS process.

Transport properties of post-stressed sol-gel-based TiO 2 films

Abstract: This paper investigates the trap property of pre-and post-stressed TiO 2 /SiO 2 stacks. It is suggested that transport is ruled by the space-charge-limited current controlled by negative-charged traps. Spectroscopic analysis of the current fluctuation demonstrates that after stress application the current path varies with the polarity of the top electrode; this suggests that there are at least two-different paths inside the degraded TiO 2 /SiO 2 stack.

Nanodot-type floating gate memory with high-density nanodot array formed utilizing listeria ferritin

Abstract: We formed a high-density two-dimensional nanodot array by utilizing Ti-binding Dps (TD) which is a Listeria ferritin with Ti-binding peptides. A high-density nanodot array over 1012 cm−2 was formed on a SiO 2 at low temperature by specific adsorption of TD. The hysteresis of the MOS capacitor with nanodot array formed utilizing TD was larger than that of the MOS capacitor fabricated utilizing ferritin. This research contributes to realizing future memory devices.

Co-evaluation of power supply noise of CMOS microprocessor using on-board magnetic probing and on-chip waveform capturing techniques

Abstract: On-chip and on-board power noise measurements were performed on a 32-bit microprocessor core in a 90-nm CMOS technology. The on-chip voltage noise and on-board near-field magnetic field measurements are related to each other with a unified power delivery network that is formed by on-chip and on-board parasitic components. The significant importance of LSI chip-package-board co-simulation is also discussed from the measurement results.

Frequency mixing with a tetrode vacuum transistor

Abstract: Performance of frequency mixing with a vacuum transistor, which is composed of a vacuum transistor with a field emitter array (FEA), a collector and a control grid, was evaluated. The parameters of the current-voltage characteristics necessary to derive the performance of frequency mixing were obtained.

Masking smoking effect to optimize bio-impedance-based alcohol-intake detection

Abstract: This paper proposes an advanced technique to detect alcohol intake that uses the bio-impedance of the human body. We take account of body weight (BW) as well as the harmonic ratio of the impedance signals of the subject as critical parameters. We demonstrate that the technique proposed here can well offset the effect of smoking and thus better detect alcohol intake.

Fundamental study on junction termination structures for ultrahigh-voltage SiC PiN diodes

Abstract: 15 kV-class 4H-SiC PiN diodes with various junction termination extension (JTE) structures have been experimentally investigated. JTE-dose dependence of the breakdown voltage for conventional single and two-zone JTE showed a narrow window of optimum JTE-dose to obtain high breakdown voltage. To widen this window, space-modulated JTE (SM-JTE) was introduced. 4H-SiC PiN diodes with SM-JTE showed a highest breakdown voltage of 15 kV, and a widening of the optimum JTE-dose window to obtain ultrahigh-voltage was realized at the same time.

Comparison of electrochromic properties of NiO films prepared by chemical bath deposition and spin coating

Abstract: We report the electrochromic properties and surface structures of NiO films prepared by chemical bath deposition (CBD) and by spin coating (SC). The NiO films made by CBD exhibited large electrochromic color change compared with those made by SC. Surface micrographs observed by means of scanning electron microscope showed that the structure of the NiO film made by CBD was porous, while SC film had a smooth surface. The large transmittance change of CBD film is due to the porous structure of the CBD film. In addition, we show the transmittance change of CBD film depends on the deposition time, and it has a maximum value at a certain deposition time.