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Showing papers presented at "Parallel and Distributed Processing Techniques and Applications in 2011"




Proceedings Article
01 Jan 2011
TL;DR: This paper shows that prototyping such a library with a structured parallel functional language, namely Bulk Synchronous Parallel ML, provides a parallel implementation with which experiments can be performed and gives some hints about the formal semantics of the library as well.
Abstract: Algorithmic skeletons are a high-level approach to parallel programming that can be combined with widely used programming languages such as Java, C and C++ In this paper we show that prototyping such a library with a structured parallel functional language, namely Bulk Synchronous Parallel ML, provides a parallel implementation with which experiments can be performed and gives some hints about the formal semantics of the library as well

1 citations


Proceedings Article
01 Jan 2011
TL;DR: In this paper, the authors analyzed differences in performance and platform organization between widely used general-purpose computing (GPGPU) computational platforms (both hardware and software) and presented performance measurements for some GPGPU hardware architectures.
Abstract: Nowadays a technique of using graphics processing units (GPUs) for general-purpose computing (or GPGPU) is becoming more and more widespread. The goal of this paper is to analyze efficiency of computing with use of the GPGPU technique, depending on several factors. In this paper, there are analyzed differences in performance and platform organization between widespread GPGPU computational platforms (both hardware and software). There are also described differences between CPU and GPU computations, as well as presented performance measurements for some GPGPU hardware architectures. This paper can help software developers choose more appropriate ways to implement specific fairly large computational tasks.

Proceedings Article
01 Jan 2011
TL;DR: This article presents a mixed integer linear programming (MILP) formulation to gridded dogleg channel routing problems and shows that high degrees of scalability can be achieved.
Abstract: Channel routing is a type of problems arising in the detailed routing phase of VLSI physical design automation as well as in the design of printed circuit boards (PCBs). It has been known that channel routing problems can be formulated as constraint programming (CP) problems and thus CP solvers can be used to find solutions. In this article, we present a mixed integer linear programming (MILP) formulation to gridded dogleg channel routing problems. As a result, parallel MILP solvers, which have the ability to exploit the computational power of multi-core processors, can be used to find solutions. Experimental results show that high degrees of scalability can be achieved. Owing to the properties of MILP problems, it is possible to further shorten the execution time if a computer containing more processor cores is available.