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Showing papers presented at "Workshop On Computer Architecture Education in 1997"



Proceedings ArticleDOI
01 Jan 1997
TL;DR: An interactive, visual pipeline simulator, called dlxview, for the DLX instruction set and pipeline described in Computer Architecture A Quantitative Approach, which provides animated versions of key figures and tables from the text and allows the user to readily follow details of pipeline activity as a code is simulated.
Abstract: We have built an interactive, visual pipeline simulator, called dlxview, for the DLX instruction set and pipeline described in Computer Architecture A Quantitative Approach by Hennessy and Patterson [1]. This software provides animated versions of key figures and tables from the text and allows the user to readily follow details of pipeline activity as a code is simulated, to vary pipeline implementation, and to compare performance across different pipeline designs.The software package requires a system running Unix and X11, with Tcl/Tk installed, and using the GNU gcc compiler is recommended. A 256 color display with 1024x768 pixels is best for display, due to the detailed diagrams of the DLX pipeline. The software has been designed to run on a variety of platforms and has been tested on Solaris 2.3, SunOS 4.1.1, HP-UX 9.0, DEC OSF/1 4.0, and Linux kernel 1.2.1. DLXview is available at http://yara.ecn.purdue.edu/~teamaaa/dlxview/

22 citations


Proceedings ArticleDOI
P. S. Coe1, F. W. Howell1, Roland N. Ibbett1, R. McNab1, L. M. Williams1 
01 Jan 1997
TL;DR: The Integrated Learning Support Environment (ILSE) for Computer Architecture provides structured on-line access to a large body of text and diagrams in which the diagrams may in some cases be animated to provide a visual demonstration of activities occurring within a computer system.
Abstract: The Integrated Learning Support Environment (ILSE) for Computer Architecture provides structured on-line access to a large body of text and diagrams in which the diagrams (a) remain visible on-screen even when the text is scrolled, (b) may in some cases be animated to provide a visual demonstration of activities occurring within a computer system. It uses a WWW multi-frame window system, with separate frames for text, diagrams and navigation control. The animated diagrams are driven by output from an architecture simulation system which has been (re-)written in Java. Using Java, live simulations can be incorporated into the WWW pages and run remotely.

5 citations


Proceedings ArticleDOI
Mayan Moudgill1
01 Jan 1997

3 citations



Proceedings ArticleDOI
01 Jan 1997
TL;DR: BPSim (Branch Prediction Simulator) is a trace-driven simulator for predicting branch outcomes in high performance processors that incorporates various dynamic prediction schemes widely reported in the literature and practiced in existing processors.
Abstract: BPSim (Branch Prediction Simulator) is a trace-driven simulator for predicting branch outcomes in high performance processors. It incorporates various dynamic prediction schemes widely reported in the literature and practiced in existing processors such as the MIPS R10000, Pentium Pro and Alpha 21164 [1, 10, 13]. Users can benefit from the completeness and flexibility of this simulator in gaining an understanding of the trade-off between prediction accuracy and hardware cost especially in an education environment.

1 citations


Proceedings ArticleDOI
01 Jan 1997
TL;DR: Two tools which have been developed at Digital Equipment Corporation, in collaboration with Northeastern University's Computer Architecture Research Laboratory, which capture operating-system rich traces are described, used for capturing trace information on an DEC Alpha-based system, running either the DEC Unix or Microsoft Windows NT operating system.
Abstract: Trace-driven simulation is commonly used by the computer architecture community to answer a wide range of design questions. Traces taken from benchmark program execution (commonly from the SPEC95 suite) have been used extensively to study instruction scheduling, branch prediction, and cache design. Today's computer designs have been optimized based on the workload characteristics of these benchmarks.One important issue which has been ignored in these traces is the lack of operating system activity. It has been acknowledged by a number of researchers that operating system interaction can severely affect the validity of any trace-driven simulation study. The major reason why most studies have elected to ignore this fact is due to the difficulty of obtaining such traces.In this contribution we describe two tools which have been developed at Digital Equipment Corporation, in collaboration with Northeastern University's Computer Architecture Research Laboratory, which capture operating-system rich traces. These tools can be used for capturing trace information on an DEC Alpha-based system, running either the DEC Unix or Microsoft Windows NT operating system.

1 citations


Proceedings ArticleDOI
01 Jan 1997
TL;DR: This DLX-based superscalar simulator is instruction-driven, which offers richer educational features than most of the trace-driven simulators, and is fully configurable and re-configurable.
Abstract: We have designed a DLX-based superscalar processor simulator. This simulator provides many more functions than its predecessors developed elsewhere. We have added trap handlers and required C functions in the system so that most of the SPEC92 programs now run on the simulator. In addition, this simulator is fully configurable and re-configurable. Specifically, the following options and functions are provided by the simulator.• Central window versus distributed reservation stations.• Branch prediction mechanisms using static or dynamic schemes. The later provides branch target buffer and branch history table.• Configurable functional units.• A fully configurable KNL non-blocking cache structure incorporated int he simulator. (K: the number of ways. N: the number of cache lines in a way. L: line size). Split versus unified option and cm + βmL/D memory latency model.• Better debugging functions allowing the interruption of the simulation, reconfiguration, restart in a cycle-by-cycle fashion, or run to the end.• NT/Win95 platform ready.This DLX-based superscalar simulator is instruction-driven, which offers richer educational features than most of the trace-driven simulators. For information about this simulator, please refer to http://com.el.yuntech.edu.tw.