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Showing papers by "Agilent Technologies published in 1989"


Patent
10 Jan 1989
TL;DR: In this paper, via-holes and a wraparound metal plating are simultaneously formed on semiconductor chips by patterning a photoresist mask on the front surface of the wafer to open windows over metal pads as well as the grid areas where wraound plating is desired.
Abstract: Metallized via-holes and a wraparound metal plating are simultaneously formed on semiconductor chips by patterning a photoresist mask on the front surface of the wafer to open windows over metal pads as well as the grid areas where wraparound plating is desired; etching off the exposed metal if necessary and forming via-holes and grooves in the wafer by reactive ion etching to a depth which is less than the total thickness of the wafer; depositing a thin conductive film along the walls of the grooves and via-holes by electroless methods; plating the walls of the grooves and the via-holes with conductive metal by electrolytic methods; removing the back surface of the wafer ("backlapping") along with the floors of both the grooves and the via-holes, to expose the metal on the wall of the via-holes and separate the individual chips; and, depositing conductive metal on the back surface of the individual chips to complete the grounding path.

98 citations


Patent
18 Dec 1989
TL;DR: In this paper, a transparent window layer of semiconductor different from AlGaInP overlies the active layers and has a lower electrical resistivity than the active layer and a bandgap greater than the bandgap of active layers, for minimizing current crowding from a metal electrical contact over the transparent window.
Abstract: A light-emitting diode has a semiconductor substrate underlying active p-n junction layers of AlGaInP for emitting light. A transparent window layer of semiconductor different from AlGaInP overlies the active layers and has a lower electrical resistivity than the active layers and a bandgap greater than the bandgap of the active layers, for minimizing current crowding from a metal electrical contact over the transparent window layer. The active layers may be epitaxially grown on a temporary GaAs substrate. A layer of lattice mismatched GaP is then grown on the active layers with the GaP having a bandgap greater than the bandgap of the active layers so that it is transparent to light emitted by the LED. The GaAs temporary substrate is then selectively etched away so that the GaP acts as a transparent substrate. A transparent window layer may be epitaxially grown over the active layers on the face previously adjacent to the GaAs substrate.

97 citations


Patent
10 Feb 1989
TL;DR: In this article, the break point instruction is used as a flag to indicate that the target address of a jump operation is the address location that contains the break-point instruction that was substituted for one of the program instructions retrieved from the instruction memory.
Abstract: The test apparatus for monitoring the operation of a processor that has multiple instruction fetch capability monitors the instruction memory to record the sequence of program instructions that are retrieved by the processor from program memory. The test apparatus determines when a jump operation is executed and determines the target of the jump oepration by inserting a break point instruction in place of one of the two program instructions that is retrieved by the processor from program memory. This instruction substitution is accomplished by an instruction jamming circuit that forces the break point instruction onto the processor data bus as part of the program instruction fetch cycle in lieu of one of the instruction retrieved as part of the execution of the jump instruction. If the break point operation is executed, then the target address of the jump operation is the address location that contains the break point instruction that was substituted for one of the program instructions retrieved from the instruction memory. In this case, the test apparatus responds to the execution of the break point instruction by replacing the program instruction originally retrieved from program memory and substituted for by the break point instruction. Thus, the break point instruction acts as a flag to indicate that this address is the target address of the jump instruction. If the break point instruction is not executed by the processor, it is because the jump instruction target address is the location that contains the other retrieved program instruction.

29 citations


Patent
12 Dec 1989
TL;DR: In this article, an oscilloscope-like user interface for a logic analyzer is presented, which simplifies user control of the analyzer and does not require user understanding of the sampling hardware.
Abstract: Provided is an oscilloscope-like user-interface for a logic analyzer. The oscilloscope-like user-interface simplifies user control of the logic analyzer. The oscilloscope-like user-interface substitutes two oscilloscope-like controls (seconds-per-division and delay) for six logic analyzer controls (sample-period, magnification, magnify-about, magnify-about marker-movement, start/center/end, and delay-from-trigger). The result of the substitution is a logic analyzer which is operable with oscilloscope-like controls and which does not require user understanding of the logic analyzer's sampling hardware for effective user operation.

22 citations


Patent
07 Jul 1989
TL;DR: In this article, an edge generation circuit phase delays pulses of a first signal propagated on an integrated circuit, including a first variable delay circuit, a delay line located off the integrated circuit and a second variable delay circuits located on the integrated circuits.
Abstract: An edge generation circuit phase delays pulses of a first signal propagated on an integrated circuit. The edge generation circuit includes a first variable delay circuit located on the integrated circuit, a delay line located off the integrated circuit and a second variable delay circuit located on the integrated circuit. The first variable delay circuit receives the first signal and produces a second signal which is in phase with the first signal. The delay line receives the second signal and produces a third signal. The third signal is delayed in phase from the second by a precise amount. The second variable delay circuit receives the third signal from the delay line and produces a fourth signal. The fourth signal is in phase with the third signal.

20 citations


Patent
06 Dec 1989
TL;DR: In this article, a method for compressing sequences of data-vectors, which sequences are to be used for testing circuit boards with the aid of a circuit board testing machine, is presented.
Abstract: Disclosed is a method for compressing sequences of data-vectors, which sequences are to be used for testing circuit boards with the aid of a circuit board testing machine. The method involves an initial compression of the data-vector sequence followed by a so-called K-T transformation of the remaining data-vectors. The initial compression involves eliminating redundant data-vectors from the initial sequence and retaining only the unique data-vectors together with sequencing information indicating where in the initial sequence each unique-data vector occurred. The K-T transformation involves a bitwise logical exclusive-OR operation (XOR) whereby the remaining data-vector sequence is K-T transformed thereby further compressing the sequence without losing any of the original sequence information.

14 citations


Patent
15 Dec 1989
TL;DR: In this article, a latching shift register is used for applying data for a selected die to the data FETs, and the substrate of the selected die is connected to ground.
Abstract: A light emitting diode printhead has a row of LED dice, with each die having one or more rows of LEDs. The LED die substrate forms a common cathode for the LEDs on that die. There is a time multiplex driver for a plurality of dice comprising a plurality of current sources. Each current source comprises a current driver FET and a data FET in series. Each data FET is connected in parallel to the anodes of corresponding LEDs on all of the dice. Switches selectively connect the substrate of each die to ground. A latching shift register is used for applying data for a selected die to the data FETs. The register is divided into the same number of blocks as the number of dice, and each block has the same number of bits as the LEDs on a die. At the same time a block of data for a selected die is connected to the data FETs, the substrate of the selected die is connected to ground, thereby enabling only the light emitting diodes on the selected die.

7 citations


Patent
31 Mar 1989
TL;DR: In this article, a test instrument display to the user an estimate of a future measurement while adjusting the control settings of the instrument in order to aid knob and button settings facilitates making adjustments visually during measurements which take longer than a fraction of a second.
Abstract: of EP0335729Upon the adjustment of a control setting of a test instrument, the current data (taken before the change is effected) is manipulated by recalculating the trace data in light of any adjustment that is entered by a user. This represents an estimate of the effect of the adjustment in the control setting, and this estimate is redrawn on a display device. This modified image is preferably displayed before the real new image is ready to be displayed. This provides immediate feedback to the user so that adjustments can be effected without slowing the measurement process. Various embodiments provide panning or repositioning the trace left and right while changing the x-axis center frequency; stretching or compressing the trace (spanning) while changing the frequency span; or using a combination for adjustments to only the start or stop frequency. In one embodiment, the estimate can be displayed only after the user has committed to having a new measurement performed. Alternatively, in another embodiment, estimates can be displayed continuously while the user is making adjustments and before the user has committed to performing a new measurement. Having a test instrument display to the user an estimate of a future measurement while adjusting the control settings of the instrument in order to aid knob and button settings facilitates making adjustments visually during measurements which take longer than a fraction of a second. By having an immediate response on the display device, the user is not required to make blind changes.

5 citations