Institution
Agilent Technologies
Company•Santa Clara, California, United States•
About: Agilent Technologies is a company organization based out in Santa Clara, California, United States. It is known for research contribution in the topics: Signal & Mass spectrometry. The organization has 7398 authors who have published 11518 publications receiving 262410 citations. The organization is also known as: Agilent Technologies, Inc..
Papers published on a yearly basis
Papers
More filters
••
TL;DR: Investigation of the proteome of human cerebrospinal fluid with the help of shotgun mass spectrometry identifies more than 100 proteins that belong to a variety of different classes ranging from serum proteins to intracellular mediators that are involved in signal transduction and transcription.
Abstract: We have analyzed the proteome of human cerebrospinal fluid with the help of shotgun mass spectrometry. In order to identify low-abundant proteins in these fluids, we have found it necessary to remove the abundant protein components from the mixture. Immunodepletion of the abundant proteins has allowed us to identify more than 100 proteins in cerebrospinal fluids from a patient suffering from normal pressure hydrocephalus. The identified proteins belong to a variety of different classes ranging from serum proteins to intracellular mediators that are involved in signal transduction and transcription. This work establishes a platform for future studies aimed at the comparative proteome analysis of cerebrospinal fluids from different groups of patients suffering from various psychiatric and neurological disorders.
88 citations
••
TL;DR: Three techniques to speedup fundamental problems in data mining algorithms on the CUDA platform are proposed: scalable thread scheduling scheme for irregular pattern, parallel distributed top-k scheme, and parallel high dimension reduction scheme.
Abstract: Recent development in Graphics Processing Units (GPUs) has enabled inexpensive high performance computing for general-purpose applications. Compute Unified Device Architecture (CUDA) programming model provides the programmers adequate C language like APIs to better exploit the parallel power of the GPU. Data mining is widely used and has significant applications in various domains. However, current data mining toolkits cannot meet the requirement of applications with large-scale databases in terms of speed. In this paper, we propose three techniques to speedup fundamental problems in data mining algorithms on the CUDA platform: scalable thread scheduling scheme for irregular pattern, parallel distributed top-k scheme, and parallel high dimension reduction scheme. They play a key role in our CUDA-based implementation of three representative data mining algorithms, CU-Apriori, CU-KNN, and CU-K-means. These parallel implementations outperform the other state-of-the-art implementations significantly on a HP xw8600 workstation with a Tesla C1060 GPU and a Core-quad Intel Xeon CPU. Our results have shown that GPU + CUDA parallel architecture is feasible and promising for data mining applications.
88 citations
•
06 Oct 1997TL;DR: In this article, the authors present a memory system and device for synchronizing response across multiple memory devices, whether arranged serially upon a single data bus, in parallel across multiple data busses, or both.
Abstract: This disclosure provides a memory system and device for synchronizing response across multiple memory devices (105), whether arranged serially upon a single data bus, in parallel across multiple data busses (107), or both. A memory controller (103) periodically configures the system (101) by separately placing each memory chip (105) into a configuration mode. While in this mode, the chip (105) is polled by the controller (103) along the corresponding data bus (107), and the chip (105) responds with a reply. The controller (103) uses this reply to compute elapsed time between polling and the reply. Using all of the chips (105), the controller (103) determines the maximum response time, in termes of elapsed clock cycles. Based on this maximum time, and the individual response times for each chip, the controller (103) then programs each chip (105) with a number which defines chip-based delay (149) for responses to data read operations. In this manner, successive data reads can be performed on successive clock cycles without awaiting prior completion of earlier data reads. In addition, in a multiple data bus system, the controller (103) is not delayed by having to wait for all simultaneous data reads across a wide bus.
88 citations
••
TL;DR: P polarization division multiplexed 512QAM and 256QAM modulation formats in combination with Nyquist pulse shaping having virtually zero roll-off are used, demonstrating for the first time transmission of 54 Gbit/s and 48 G Bit/s over 44 km and 150 km, utilizing an optical bandwidth of only 3 GHz.
Abstract: We demonstrate for the first time transmission of 54 Gbit/s and 48 Gbit/s over 44 km and 150 km, respectively, utilizing an optical bandwidth of only 3 GHz. We used polarization division multiplexed 512QAM and 256QAM modulation formats in combination with Nyquist pulse shaping having virtually zero roll-off. The resulting spectral efficiencies range up to 18 bit/s/Hz and 16 bit/s/Hz, respectively. Taking into account the overhead required for forward error correction, the occupied signal bandwidth corresponds to net spectral efficiencies of 14.4 bit/s/Hz and 15 bit/s/Hz, which could be achieved in a wavelength division multiplexed network without spectral guard bands.
88 citations
•
05 Mar 2001TL;DR: In this paper, a thin-film bulk acoustic resonator (FBAR) is fabricated on a substrate by introducing a mass loading top electrode layer for multiple resonators, and the top mass loading electrode layer is introduced for only selected resonator to provide resonators having different resonance frequencies on the same substrate.
Abstract: A method for fabricating a resonator, and in particular, a thin film bulk acoustic resonator (FBAR), and a resonator embodying the method are disclosed. An FBAR is fabricated on a substrate by introducing a mass loading top electrode layer. For a substrate having multiple resonators, the top mass loading electrode layer is introduced for only selected resonator to provide resonators having different resonance frequencies on the same substrate.
88 citations
Authors
Showing all 7402 results
Name | H-index | Papers | Citations |
---|---|---|---|
Hongjie Dai | 197 | 570 | 182579 |
Zhuang Liu | 149 | 535 | 87662 |
Jie Liu | 131 | 1531 | 68891 |
Thomas Quertermous | 103 | 405 | 52437 |
John E. Bowers | 102 | 1767 | 49290 |
Roy G. Gordon | 89 | 449 | 31058 |
Masaru Tomita | 76 | 677 | 40415 |
Stuart Lindsay | 74 | 347 | 22224 |
Ron Shamir | 74 | 319 | 23670 |
W. Richard McCombie | 71 | 144 | 64155 |
Tomoyoshi Soga | 71 | 392 | 21209 |
Michael R. Krames | 65 | 321 | 18448 |
Shabaz Mohammed | 64 | 188 | 17254 |
Geert Leus | 62 | 609 | 19492 |
Giuseppe Gigli | 61 | 541 | 15159 |