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Institution

Agilent Technologies

CompanySanta Clara, California, United States
About: Agilent Technologies is a company organization based out in Santa Clara, California, United States. It is known for research contribution in the topics: Signal & Mass spectrometry. The organization has 7398 authors who have published 11518 publications receiving 262410 citations. The organization is also known as: Agilent Technologies, Inc..


Papers
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Patent
17 Oct 2007
TL;DR: An apparatus and method for synchronous communications using a serial data stream employs a housing with a controller and a back plane, where the back plane distributes power to the modules and provides a communication link from the controller to each module.
Abstract: An apparatus and method for synchronous communications using a serial data stream employs a housing with a controller and a back plane The housing accepts one or more modules for interconnection with the back plane The back plane distributes power to the modules and provides a communication link from the controller to each module Each communication link includes a data out line, a data in line and a clock line, where each clock line is derived from one clock source

65 citations

Patent
30 Nov 1999
TL;DR: In this article, a channel and test plans are implemented in connection with a plurality of nodes that communicate signals, and each test plan prescribes measurement of at least one node and/or channel signal parameters.
Abstract: Channel and test plans are implemented in connection with a plurality of nodes that communicate signals. The channel plan has one or more predefined specifications for each of one or more signal channels on each of the nodes. The channel plan enables a monitoring system to generate and conduct automatic periodic node test plans based upon the predefined specifications. Each test plan prescribes measurement of at least one node and/or channel signal parameter. The monitoring system includes a spectrum analyzer, a switch enabling the spectrum analyzer to interface with the nodes, and a controller. The controller is configured to enable creation of and display the channel plan and test plan, and to automate the node testing. The test plan may include alarm thresholds that are triggered and tracked when a signal parameter of a node or channel exceeds an alarm threshold.

64 citations

Patent
01 Dec 1999
TL;DR: In this paper, a set of LEDs arranged in a matrix and having a control circuit which acts as a controllable current source and as controllability voltage source, so that a constant current can be applied for each LED and the respective voltage is established accordingly.
Abstract: Optical vehicle display having a set of LEDs arranged in a matrix and having a control circuit which acts as a controllable current source and as controllable voltage source, so that a constant current can be applied for each LED and the respective voltage is established accordingly. An optical vehicle display designed in this way permits a design as a taillight, brake light, flashing indicator and the like in a motor vehicle with favorable production at the same time due to reduced faulty assembly and simple adjustment of the light values.

64 citations

Patent
29 Jul 1998
TL;DR: In this article, a stackable memory system for minimizing the stub lengths of the memory data bus and data skew is presented. But the system is not suitable for the use of a large number of memory chips.
Abstract: A stackable memory system for minimizing the stub lengths of the memory data bus and data skew. The invention provides a memory controller, a memory connector, a data bus, a first stackable memory module and a terminator plate. The data bus electrically connects the controller to the memory connector. The first stackable memory module is mechanically and electrically connected to the memory connector. The terminator plate is adapted to substantially reduce reflections to the data bus and is electrically connected to the data bus through the first stackable memory module. Additional, the memory system may be expanded by adding stackable memory modules substantially similar to the first stackable memory module to the stackable memory system between the first memory module and the terminator plate. Each stackable memory module may include memory chips each of which has trace lines connecting the memory chip to a module connector. Each of the trace lines is substantially equal in length and connects to a single side of the memory chip.

64 citations

Proceedings ArticleDOI
28 Mar 2013
TL;DR: BiCMOS technology is utilized to provide high dynamic range analog-to-digital conversion at 2.5GS/s with a metastable error rate of less than one error per year and better than 78dB SFDR over a 1GHz BW.
Abstract: Metastable events in ADC comparators cause large errors that cannot be tolerated in test and measurement applications that record data over extended time intervals. This work utilizes BiCMOS technology to provide high dynamic range analog-to-digital conversion at 2.5GS/s with a metastable error rate of less than one error per year and better than 78dB SFDR over a 1GHz BW.

64 citations


Authors

Showing all 7402 results

NameH-indexPapersCitations
Hongjie Dai197570182579
Zhuang Liu14953587662
Jie Liu131153168891
Thomas Quertermous10340552437
John E. Bowers102176749290
Roy G. Gordon8944931058
Masaru Tomita7667740415
Stuart Lindsay7434722224
Ron Shamir7431923670
W. Richard McCombie7114464155
Tomoyoshi Soga7139221209
Michael R. Krames6532118448
Shabaz Mohammed6418817254
Geert Leus6260919492
Giuseppe Gigli6154115159
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20231
20228
2021142
2020157
2019168
2018164