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Institution

Agilent Technologies

CompanySanta Clara, California, United States
About: Agilent Technologies is a company organization based out in Santa Clara, California, United States. It is known for research contribution in the topics: Signal & Mass spectrometry. The organization has 7398 authors who have published 11518 publications receiving 262410 citations. The organization is also known as: Agilent Technologies, Inc..


Papers
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Proceedings ArticleDOI
Jeff Rearick1, Bill Eklow, Ken Posse, Al Crouch, Ben Bennetts 
08 Nov 2005
TL;DR: The need for a standard description of internal test features and protocols is elucidated, and the framework for the extension of the boundary scan standards as launched by the ad hoc IJTAG working group is described.
Abstract: The widespread use of the IEEE 1149.1 standard test access port as the interface for not only boundary scan but also for access to device-internal test features has led to a highly useful but highly fragmented opportunity for the test community. The need for a standard description of internal test features and protocols is elucidated, and the framework for the extension of the boundary scan standards as launched by the ad hoc IJTAG working group is described

57 citations

Proceedings ArticleDOI
05 Mar 2006
TL;DR: The Terabus project as discussed by the authors is based on a silicon-carrier interposer on an organic card containing 48 polymer waveguides for low power optical transmitters and receivers.
Abstract: Terabus is based on a silicon-carrier interposer on an organic card containing 48 polymer waveguides. We have demonstrated 4/spl times/12 arrays of low power optical transmitters and receivers, operating up to 20 Gb/s and 14 Gb/s per channel respectively.

57 citations

Patent
13 May 2005
TL;DR: In this article, a method of generating a monitoring datagram for a predetermined network includes generating an initial datagram and encapsulating the initial dataagram with a shim header, where the header has a first shim entry and a second shim entries associated with the predetermined network.
Abstract: A method of generating a monitoring datagram for a predetermined network includes generating an initial datagram and encapsulating the initial datagram with a shim header, where the shim header has a first shim entry and a second shim entry, the first and second shim entries are associated with the predetermined network, the first shim entry is next to and follows the second shim entry, and where the first shim entry identifies the initial datagram as having a monitoring status.

57 citations

Journal ArticleDOI
TL;DR: In this article, the effects of the thickness of the PCB with a microvia build-up layer on the solder joint reliability of the WLCSP assembly were investigated and it was found that, due to the large coefficient of thermal expansion of the buildup resin, the effect of thickness of a PCB with micro-via buildup layer become much more significant than that without the microvias.
Abstract: The creep analyses of solder-bumped wafer level chip scale package (WLCSP) on build-up printed circuit board (PCB) with microvias subjected to thermal cyclic loading are presented. The emphasis of this study is placed on the effects of the thickness of the PCB with a microvia build-up layer on the solder joint reliability of the WLCSP assembly. The 62Sn-2Ag-36Pb solder joints are assumed to follow the Garofalo-Arrhenius creep constitutive law. The shear stress and creep shear strain hysteresis loops, shear stress range, creep shear strain range, and creep strain energy density range at different locations in the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of the solder-bumped WLCSP on build-up PCB with microvias. It is found that, due to the large coefficient of thermal expansion of the build-up resin, the effects of thickness of the PCB with microvia build-up layer become much more significant than that without the microvia build-up layer.

57 citations

Patent
15 May 2000
TL;DR: In this article, a microchip includes a carrier with a micro spray tip projecting vertically out of a plane of the carrier and a passage channel which conveys the substances to be sprayed from a channel to a spray tip aperture.
Abstract: A laboratory microchip includes a carrier with a micro spray tip projecting vertically out of a plane of the carrier. The carrier and spray tip are designed as a monolithic or single unit. The spray tip includes a passage channel which conveys the substances to be sprayed from a channel to a spray tip aperture. The channel is a part of a channel structure which is enclosed to the outside by a cover plate. The spray tip includes, on the sides of the spray aperture, an area which tapers conically inwards. Connected to this tapered area is a constant cross-section drill hole forming an annular internal step formation at the transition between the two areas. The outer diameter of the conically tapering tip is locally reduced in proximity to the aperture to provide a finer tip to the spray tip. The finer tip increases the electrical fields occurring at the tip, to further increase the forces which act on the substances and for dispersion spraying.

57 citations


Authors

Showing all 7402 results

NameH-indexPapersCitations
Hongjie Dai197570182579
Zhuang Liu14953587662
Jie Liu131153168891
Thomas Quertermous10340552437
John E. Bowers102176749290
Roy G. Gordon8944931058
Masaru Tomita7667740415
Stuart Lindsay7434722224
Ron Shamir7431923670
W. Richard McCombie7114464155
Tomoyoshi Soga7139221209
Michael R. Krames6532118448
Shabaz Mohammed6418817254
Geert Leus6260919492
Giuseppe Gigli6154115159
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20231
20228
2021142
2020157
2019168
2018164