Carnegie Mellon University

About: Carnegie Mellon University is a education organization based out in Pittsburgh, Pennsylvania, United States. It is known for research contribution in the topics: Computer science & Robot. The organization has 36317 authors who have published 104359 publications receiving 5975734 citations. The organization is also known as: CMU & Carnegie Mellon.

Measuring manufacturing performance: a new challenge for managerial accounting research

Abstract: Problems with the performance of U.S. manufacturing firms have become obvious in recent years. Japanese and Western European manufacturers are able to produce higher quality goods with fewer workers and lower inventory levels than comparable U.S. firms. The ability of foreign firms to become more efficient producers has gone largely unnoticed in the education and research programs of many U.S. business schools. A much greater commitment to understanding the factors critical to the success of manufacturing firms is needed. While an understanding of the determinants for successful manufacturing performance will require contributions from many disciplines, accounting can play a critical role in this effort. Accounting researchers can attempt to develop non-financial measures of manufacturing performance, such as productivity, quality, and inventory costs. Measures of product leadership, manufacturing flexibility, and delivery performance could be developed for firms bringing new products to the marketplace. Expanded performance measures are also necessary for capital budgeting procedures and to monitor production using the new technology of flexible manufacturing systems. A particular challenge is to de-emphasize the current focus of senior managers on simple, aggregate, short-term financial measures and to develop indicators that are more consistent with long-term competitiveness and profitability.

PowerNap: eliminating server idle power

Abstract: Data center power consumption is growing to unprecedented levels: the EPA estimates U.S. data centers will consume 100 billion kilowatt hours annually by 2011. Much of this energy is wasted in idle systems: in typical deployments, server utilization is below 30%, but idle servers still consume 60% of their peak power draw. Typical idle periods though frequent--last seconds or less, confounding simple energy-conservation approaches.In this paper, we propose PowerNap, an energy-conservation approach where the entire system transitions rapidly between a high-performance active state and a near-zero-power idle state in response to instantaneous load. Rather than requiring fine-grained power-performance states and complex load-proportional operation from each system component, PowerNap instead calls for minimizing idle power and transition time, which are simpler optimization goals. Based on the PowerNap concept, we develop requirements and outline mechanisms to eliminate idle power waste in enterprise blade servers. Because PowerNap operates in low-efficiency regions of current blade center power supplies, we introduce the Redundant Array for Inexpensive Load Sharing (RAILS), a power provisioning approach that provides high conversion efficiency across the entire range of PowerNap's power demands. Using utilization traces collected from enterprise-scale commercial deployments, we demonstrate that, together, PowerNap and RAILS reduce average server power consumption by 74%.

Electrical control of 2D magnetism in bilayer CrI 3 .

Abstract: Controlling magnetism via electric fields addresses fundamental questions of magnetic phenomena and phase transitions1–3, and enables the development of electrically coupled spintronic devices, such as voltage-controlled magnetic memories with low operation energy4–6. Previous studies on dilute magnetic semiconductors such as (Ga,Mn)As and (In,Mn)Sb have demonstrated large modulations of the Curie temperatures and coercive fields by altering the magnetic anisotropy and exchange interaction2,4,7–9. Owing to their unique magnetic properties10–14, the recently reported two-dimensional magnets provide a new system for studying these features15–19. For instance, a bilayer of chromium triiodide (CrI3) behaves as a layered antiferromagnet with a magnetic field-driven metamagnetic transition15,16. Here, we demonstrate electrostatic gate control of magnetism in CrI3 bilayers, probed by magneto-optical Kerr effect (MOKE) microscopy. At fixed magnetic fields near the metamagnetic transition, we realize voltage-controlled switching between antiferromagnetic and ferromagnetic states. At zero magnetic field, we demonstrate a time-reversal pair of layered antiferromagnetic states that exhibit spin-layer locking, leading to a linear dependence of their MOKE signals on gate voltage with opposite slopes. Our results allow for the exploration of new magnetoelectric phenomena and van der Waals spintronics based on 2D materials.

Flipping bits in memory without accessing them: an experimental study of DRAM disturbance errors

Abstract: Memory isolation is a key property of a reliable and secure computing system--an access to one memory address should not have unintended side effects on data stored in other addresses. However, as DRAM process technology scales down to smaller dimensions, it becomes more difficult to prevent DRAM cells from electrically interacting with each other. In this paper, we expose the vulnerability of commodity DRAM chips to disturbance errors. By reading from the same address in DRAM, we show that it is possible to corrupt data in nearby addresses. More specifically, activating the same row in DRAM corrupts data in nearby rows. We demonstrate this phenomenon on Intel and AMD systems using a malicious program that generates many DRAM accesses. We induce errors in most DRAM modules (110 out of 129) from three major DRAM manufacturers. From this we conclude that many deployed systems are likely to be at risk. We identify the root cause of disturbance errors as the repeated toggling of a DRAM row's wordline, which stresses inter-cell coupling effects that accelerate charge leakage from nearby rows. We provide an extensive characterization study of disturbance errors and their behavior using an FPGA-based testing platform. Among our key findings, we show that (i) it takes as few as 139K accesses to induce an error and (ii) up to one in every 1.7K cells is susceptible to errors. After examining various potential ways of addressing the problem, we propose a low-overhead solution to prevent the errors