Center for Discrete Mathematics and Theoretical Computer Science

About: Center for Discrete Mathematics and Theoretical Computer Science is a facility organization based out in Piscataway, New Jersey, United States. It is known for research contribution in the topics: Local search (optimization) & Optimization problem. The organization has 140 authors who have published 175 publications receiving 2345 citations.

On Isomorphisms of Vertex-transitive Graphs

Abstract: The isomorphism problem of Cayley graphs has been well studied in the literature, such as characterizations of CI (DCI)-graphs and CI (DCI)-groups. In this paper, we generalize these to vertex-transitive graphs and establish parallel results. Some interesting vertex-transitive graphs are given, including a first example of connected symmetric non-Cayley non-GI-graph. Also, we initiate the study for GI and DGI-groups, defined analogously to the concept of CI and DCI-groups.

A real-time capacitor placement considering systematic and random mismatches in analog IC

Abstract: Capacitor mismatches result from systematic mismatches and random mismatches. It is well-known that placement in common-centroid and symmetric structure can be used to efficiently reduce systematic mismatch. However, such structure is useless for reducing random mismatch. It is found that, based on a spatial correlation model, higher correlation coefficient (a value for measuring dispersion) results in lower random mismatch and higher chip yield. This paper proposes an algorithm which can immediately achieve placements in common-centroid, symmetric structure to reduce systematic mismatches, and high correlation coefficient to reduce random mismatches. The experiment results show that the proposed algorithm can reduce the running times from dozens of minutes to zeros, and achieve correlation coefficients, in average, up to 94.29% of the known best results which are derived from searching almost the whole solution space.

Image Cosegmentation Using Shape Similarity and Object Discovery Scheme

Abstract: Image cosegmentation is a newly emerging research area in image processing. It refers to the problem of segmenting the common objects simultaneous in multiple images by utlising the similarity of foreground discovery scheme. The foreground discovery scheme is used to obtain the rough contours of the common objects which are used initial evolution curves. The energy function includes two parts: an intra-image energy and an inter-image energy. The intra-image energy explores the differences between foreground regions and background regions in each image. The inter-image energy is used to explore the similarities of the common objects among target images, which composes of a region color feature energy term and a shape constraint energy term. The region colour feature term indicates the foreground consistency and the background consistency among the images, and the shape constraint energy term allows the global changes of shapes and truncates the local variation caused by misleading features. Experimental results show that the proposed model can improve the accuracy of the image cosegmentation significantly through regularising the changes of shapes.

Cut redistribution and DSA template assignment for unidirectional design

Abstract: Wth shrinking transistors in advanced circuit designs, directed self-assembly (DSA) is considered as one of the most promising techniques for cut patterning in 1-D grided design, due to its low cost and high-manufacturing throughput. In this paper, we consider the cut redistribution and DSA template assignment problem. For a given layout, we first convert the problem to a weighted gap conflict graph. Then, a minimum weighted vertex-disjoint-path cover algorithm is proposed to divide the graph into a set of paths. Finally, for each path, a dynamic programming algorithm is used to minimize the conflicts number and the total wire cost. In particular, the dynamic programming algorithm can guarantee the optimal conflicts number. Experimental results show that our proposed method can obtain free-conflict results for all benchmarks, and achieve the best wire cost, i.e., 34.7% less than a state-of-the-art work.

The algorithm and application for the symmetrical routing

Abstract: In the integrated circuit routing, we often consider the routing for some special nets under the restrictions, such as equidistance and symmetry The symmetrical routing is operated between the routing for the bus and the clock and the routing for most the others without the priority We prove that the symmetrical routing problem under the H-V model is equivalent to finding a Steiner free of the corresponding vertices for all of the pins in the valid connected graph We put forward an algorithm for the symmetrical routing under the H-V model In the actual wiring process, when the symmetrical routing is needed, the routing is finished by hand This paper provides a method and the theory based on graphs for the automation design of the symmetrical routing