Showing papers by "Codex Corporation published in 1981"

First-in, first-out memory system

Abstract: Independent loading and first-in, first-out reading of a sequence of data words in a data store is controlled by pointers which independently indicate the next-to-be-loaded and next-to-be-read stages in the data store, the pointers being updated after each loading and reading; half-full flag circuitry indicates when at least half of the stages are occupied; and the number of stages available for storing can be selectably changed.

Multiprocessor/multimemory control system

Abstract: Apparatus for regulating access by each of a plurality of asynchronous data processors to each of a plurality of memories, each processor being associated with one of the memories and needing both read and write access to its own memory and to the processor's memories, the apparatus including local bus circuitry to selectably permit each processor to have, or to prevent each processor from having, access to its associated memory, connecting bus circuitry to selectably permit each processor to have, or to prevent each processor from having, direct access to the other processors' memories, and control circuitry for giving each requesting processor access over the connecting bus to another processor's memory, and for giving each processor access over the local bus circuitry to its own memory except when access to its own memory is being given to another one of the processors.

Do loop circuit

Abstract: In a programmable machine, a combination for executing a do loop without requiring "overhead" steps to be included in the do loop, having means for determining when the final do loop step is being executed, means for counting the number of do loop iterations remaining, and means for proceeding to the first do loop step each time the final do loop step is being executed provided the last iteration has not been reached, or otherwise for exiting from the do loop.

Digital modem transmitter

Abstract: A data modulator for transmitting a first sequence of data symbols at a symbol rate of 1/T, the modulator being characterized as having a carrier frequency of f c Hz and the data symbols being denoted as x(kT), where x(kT) is a real or complex number and k is the time index of the kth symbol, featuring, in one aspect, modulated signal generating means for receiving the first sequence and generating, in response thereto and at the symbol rate, a second sequence of complex-valued signals y(kT), the signal y(kT) representing the complex number y(kT)=x(kT)·exp (j2πf c kT), where j=√-1, and filter means for receiving the second sequence and generating, in response thereto, a third sequence of real-valued signals, at a rate higher than the symbol rate, the third sequence representing linear combinations of the real and imaginary parts of the second sequence of complex-valued signals y(kT).