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Institution

Codex Corporation

About: Codex Corporation is a based out in . It is known for research contribution in the topics: Network packet & Signal. The organization has 189 authors who have published 241 publications receiving 32205 citations.


Papers
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Journal ArticleDOI
TL;DR: Two new fast recursive least-squares algorithms with computational complexities 14m and 15m multiplications and divisions per recursion (MADPR) and a new estimation-error-oriented recursive modified Gram-Schmidt (RMGS) scheme with a complexity of 2m + 10m MADPR are introduced.
Abstract: This paper deals with efficient algorithms in the sense of minimization of the computational complexity for least-squares (LS) adaptive filters with finite memory. These filters obtain the current estimate of the desired response using only a fixed finite number of past data. First, two new fast recursive least-squares algorithms with computational complexities 14m and 15m multiplications and divisions per recursion (MADPR), respectively, are introduced ( m is the filter order). Then a new estimation-error-oriented recursive modified Gram-Schmidt (RMGS) scheme with a complexity of 2m^{2} + 10m MADPR is given. Finally, the learning characteristics of these algorithms are discussed and some simulation results are included.

26 citations

Patent
12 May 1983
TL;DR: In this paper, a logic array is fully precharged by precharging a first portion and a second portion and then applying ground to the first portion while delayably applying the ground on the second portion.
Abstract: A logic array which is small in size and low in power dissipation uses only one clock signal. The array is fully precharged by precharging a first portion and a second portion and then applying ground to the first portion while delayably applying the ground to the second portion. The address is read into the first portion during the precharging to speed up operation of the array.

26 citations

Patent
14 May 1991
TL;DR: In this paper, a digital communications device with a removeable cartridge is disclosed for programming the functions and primary operations into a digital communication device as for example a modem, and examples of programmable functions include data transmission rates, interface protocols and/or full duplex mode of operation.
Abstract: A digital communications device with a removeable cartridge is disclosed for programming the functions and primary operations into a digital communications device as for example a modem. Examples of programmable functions include data transmission rates, interface protocols and/or full duplex mode of operation.

26 citations

Patent
13 Jun 1983
TL;DR: In this article, a modulated carrier signal represents digital bits, where the first digital processing circuitry has first programmable digital circuitry for arithmetic manipulation of digital values in accordance with selectable arithmetic program instructions.
Abstract: Modem apparatus in which a modulated carrier signal represents digital bits, wherein the apparatus includes first digital processing circuitry having first programmable digital circuitry for arithmetic manipulation of digital values in accordance with selectable arithmetic program instructions to produce a correspondence between a sequence of signal values at a rate of 1/T signal values per second and a sequence of samples at a rate higher than 1/T samples per second representing the modulated carrier signal, where T represents the duration of a modulation period of the carrier signal, first bus circuitry connected to the first programmable digital circuitry for carrying the digital values and the arithmetic program instructions, and first memory circuitry connected to the first bus circuitry for storing the instructions, digital values, and signal values; second digital processing circuitry comprising second programmable digital circuitry for generating control signals corresponding to predetermined sequences of the arithmetic instructions, second bus circuitry connected to the second programmable circuitry for carrying the control signals, and second memory circuitry connected to the second bus circuitry for storing control signal program instructions; timing circuitry for timing the operation of the first and second processing circuitries, and means for providing a sequence of time-limited handshakes between the first and second processing circuitries, during which the control signals are transferred to the first processing circuitry to cause the first programmable digital circuitry to carry out the predetermined sequences of the arithmetic instructions.

25 citations

Proceedings ArticleDOI
21 Jan 1992
TL;DR: A version of the delta-y transformation for k-terminal reliability and an extension of Satyanarayana and Wood's polygon to chain transformations to handle graphs with imperfect vertices are added.
Abstract: The authors have designed and implemented a graph-reduction algorithm for computing the k-terminal reliability of an arbitrary network with possibly unreliable nodes. The two contributions of the present work are a version of the delta-y transformation for k-terminal reliability and an extension of Satyanarayana and Wood's polygon to chain transformations to handle graphs with imperfect vertices. The exact algorithm is faster than or equal to that of Satyanarayana and Wood and the simple algorithm without delta-y and polygon to chain transformations for every problem considered. The exact algorithm runs in linear time on series-parallel graphs and is faster than the above-stated algorithms for huge problems which run in exponential time. The approximate algorithms reduce the computation time for the network reliability problem by two to three orders of magnitude for large problems, while providing reasonably accurate answers (relative error less than 10/sup -3/) in most cases. >

25 citations


Authors

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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20133
20111
19991
19951
199412