Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Dynamic Healing Of Non-Volatile Memory Cells

Abstract: Methods and systems are disclosed for dynamic healing of non-volatile memory (NVM) cells within NVM systems. The dynamic healing embodiments described herein relax damage within tunnel dielectric layers for NVM cells that occurs over time from charges (e.g., holes and/or electrons) becoming trapped within these tunnel dielectric layers. NVM operations with respect to which dynamic healing processes can be applied include, for example, erase operations, program operations, and read operations. For example, dynamic healing can be applied where performance for the NVM system degrades beyond a selected performance level for an NVM operation, such as elevated erase/program pulse counts for erase/program operations and bit errors for read operations. A variety of healing techniques can be applied, such as drain stress processes, gate stress processes, and/or other desired healing techniques.

Mems inertial sensor with frequency control and method

Abstract: An inertial sensor has a transducer with a sense resonator. The sense resonator is oscillated. A signal responsive to the oscillation is provided. A first baseband signal and a second baseband signal are provided responsive to the signal responsive to the oscillation of the sense resonator. A signal for controlling a resonance frequency of the sense resonator is provided responsive to performing a Goertzel algorithm on the first baseband signal and the second baseband signal. One use of controlling the resonance frequency is to control an offset between the resonance frequency of the sense resonator and the frequency of the oscillation of drive masses in the sense resonator. Using the Goertzel algorithm is particularly efficient in controlling the resonance frequency.

An integrated circuit that performs multiple communication tasks

Abstract: An integrated circuit that provides multiple communication functions is accomplished by providing an integrated circuit (24) that includes memory (70) which stores an audio code algorithm, echo cancellation information, a modem processing algorithm, and audio data. The memory (70) is coupled via a data bus (50) to a signal converter (56), a central processing unit (58), and a first co-processor (72). The signal converter (56) provides an analog-to-digital input port (78) and a digital-to-analog output port (80) for the integrated circuit (24), wherein the audio data is received via the analog-to-digital input port (78). The central processing unit (58) executes at least a first portion of the audio coding algorithm upon the audio data and executes a first portion of the modem processing algorithm, while the first co-processor (72) executes an echo cancellation algorithm.

Strain Relaxation in Single Crystal SrTiO3 Grown on Si (001) by Molecular Beam Epitaxy

Abstract: An epitaxial layer of SrTiO3 grown directly on Si may be used as a pseudo-substrate for the integration of perovskite oxides onto silicon. When SrTiO3 is initially grown on Si (001), it is nominally compressively strained. However, by subsequent annealing in oxygen at elevated temperature, an SiOx interlayer can be formed which alters the strain state of SrTiO3. We report a study of strain relaxation in SrTiO3 films grown on Si by molecular beam epitaxy as a function of annealing time and oxygen partial pressure. Using a combination of x-ray diffraction, reflection high energy electron diffraction, and transmission electron microscopy, we describe the process of interfacial oxidation and strain relaxation of SrTiO3 on Si (001). Understanding the process of strain relaxation of SrTiO3 on silicon will be useful for controlling the SrTiO3 lattice constant for lattice matching with functional oxide overlayers.

Capacitor and method of formation and a memory cell formed therefrom

Abstract: A capacitor for use in a memory cell (10). A transistor is formed overlying a substrate (10). The transistor has a first current electrode (16) and a second current electrode (18). The current electrodes (16 and 18) are separated by a channel region. A gate electrode (26) is formed overlying the channel region and is physically separated from the channel region by a gate dielectric layer (24). A plug region (32) is formed overlying and electrically connected to the first current electrode (16). An annular high-permittivity dielectric region (33) is formed overlying the transistor and is formed from a high-permittivity dielectric layer (36). A first capacitor electrode is formed via a conductive region (38"), and a second capacitor electrode is formed via a conductive region (38'). The memory cell (10) can be formed as a non-volatile memory cell or a DRAM cell depending upon various properties of the annular high-permittivity dielectric region (33).