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Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
26 Jun 2000
TL;DR: In this article, the authors present a process for forming an electrical device, which includes applying a solid patternable film over a substrate and forming a conductive material over the substrate.
Abstract: The present invention includes a process for forming an electrical device. In one embodiment, the process includes applying a solid patternable film over a substrate and forming a conductive material over the substrate while the solid patternable film overlies the substrate, wherein the conductive material extends at least partially within an opening in the patternable film. In another embodiment, the process includes applying a patterned film over a substrate having a pad and exposing the patterned film and the substrate to energy. The patterned film includes a first region that includes a conductor and a second region that does not have a conductor. The energy of the exposure forms an electrical connection between the conductor and the pad. In yet another embodiment, the process includes mechanically applying a film over a semiconductor device substrate, patterning the film to define a first opening to expose a conductive region within the semiconductor device substrate, forming a first conductive layer within the first opening, and forming a second conductive layer over the first conductive layer.

44 citations

Patent
03 Oct 2008
TL;DR: In this article, a PWM generation module can configure the PWM data signal such that a new PWM cycle is initiated at the start of each successive frame, and further whereby those PWM cycles that would be prematurely terminated at frame boundaries are instead driven at a constant reference level until the frame boundary.
Abstract: A PWM generation module generates a PWM data signal used to control a light emitting diode (LED) driver for one or more strings of LEDs of a display device. The PWM data signal is synchronized with the frame boundaries of the video content being displayed. The PWM generation module can configure the PWM data signal such that a new PWM cycle is initiated at the start of each successive frame, and further whereby those PWM cycles that would be prematurely terminated at frame boundaries are instead driven at a constant reference level until the frame boundary. With this configuration, a substantially linear average light intensity can be achieved across frames, thereby reducing or eliminating display distortion that is often present in other PWM cycle synchronization techniques. The PWM generation module can use a self-learning process to make adjustments to the expected number of completeable PWM cycles per frame in response to dynamic changes in the frame rate, PWM frequency, or other related display parameters.

44 citations

Patent
20 May 2009
TL;DR: In this article, a gate electrode is formed over the source/drain layer of a GaN layer on a first surface of a substrate, where the bulk GaN transistor region and a BAW device region are formed.
Abstract: A bulk GaN layer is on a first surface of a substrate, wherein the bulk GaN layer has a GaN transistor region and a bulk acoustic wave (BAW) device region. A source/drain layer is over a first surface of the bulk GaN layer in the GaN transistor region. A gate electrode is formed over the source/drain layer. A first BAW electrode is formed over the first surface of the bulk GaN layer in the BAW device region. An opening is formed in a second surface of the substrate, opposite the first surface of the substrate, which extends through the substrate and exposes a second surface of the bulk GaN layer, opposite the first surface of the bulk GaN layer. A second BAW electrode is formed within the opening over the second surface of the bulk GaN layer.

44 citations

Patent
27 Jan 1986
TL;DR: In this article, an improved laser markable material useful for encapsulation of electronic devices is obtained by adding TiO2 or TiO 2 +CrO 3 to common plastic encapsulants formed from a mixture of a resin+filler+carbon black+mold release agent.
Abstract: An improved laser markable material useful for encapsulation of electronic devices is obtained by adding TiO 2 or TiO 2 +CrO 3 to common plastic encapsulants formed from a mixture of a resin+filler+carbon black+mold release agent. When irradiated by a laser, the originally grey material turns bright gold, providing a high contrast durable mark. The material has excellent marking contrast as well as better stability with time and temperature as compared to prior art laser markable encapsulants. Desirable concentrations, in weight percent of the compound, are 1-5% TiO 2 and 0-3% CrO 3 , with 1-3% TiO 2 and 0.5-2% CrO 3 being preferred. Carbon black is optional but a concentration in the range 0.1-3% by weight is desirable with 0.5-1% preferred. Improved encapsulation and marking methods and improved devices using this material are described.

44 citations

Patent
01 Mar 2011
TL;DR: In this article, the arbitration process uses memory timing and state information to determine the exact point in time at which a memory controller initiates a memory access for a corresponding memory access request and thus the component maintains information that estimates or otherwise predicts the particular state of the memory at any given time.
Abstract: A data processing system (100) employs an improved arbitration process (600) in selecting pending memory access requests received from the one or more processor cores (11) for servicing by the memory (16). The arbitration process uses memory timing and state information (401) pertaining both to memory access requests (300, 501) already submitted to the memory for servicing and to the pending memory access requests (300, 501) which have not yet been selected for servicing by the memory (16). The memory timing and state information (401) may be predicted memory timing and state information; that is, the component (14) of the data processing system (100) that implements the improved scheduling algorithm (600) may not be able to determine the exact point in time at which a memory controller (15) initiates a memory access for a corresponding memory access request and thus the component (14, 304) maintains information that estimates or otherwise predicts the particular state of the memory (16) at any given time.

44 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267