scispace - formally typeset
Search or ask a question
Institution

Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
More filters
Patent
30 Jul 2002
TL;DR: In this paper, an extended dynamic range pixel cell providing blooming protection is presented, by applying a timed varying signal to a shunt transistor in order to shunt excess charge generated by a photosensor in response to high intensity illumination.
Abstract: An extended dynamic range pixel cell providing blooming protection is disclosed herein. By applying a timed varying signal to a shunt transistor in order to shunt excess charge generated by a photosensor in response to high intensity illumination, blooming protection can be provided. In particular configurations, blooming protection is provided not only during an integration period but also during a readout period when the pixel cell is generally most susceptible to blooming problems. The time varying voltage is also used to extend the dynamic range of the pixel cell thereby increasing the pixel cells usefulness in high contrast conditions, such as bright sunlight casting deep shadows, nighttime automotive applications, and the like.

42 citations

Patent
23 Mar 1996
TL;DR: In this paper, a heat dissipation apparatus (51) has a lid (12) and an optimized fin arrangement (16) located in a cavity (57) of a base (11), where semiconductor chips (41, 42, 43, 44, 45, and 46) are coupled to the lid and a heat conducting medium (47) is forced into the cavity through a port (13) and out of the cavity via a different port (14).
Abstract: A heat dissipation apparatus (51) has a lid (12) and an optimized fin arrangement (16) located in a cavity (57) of a base (11). Semiconductor chips (41, 42, 43, 44, 45, and 46) are coupled to the lid (12), and a heat conducting medium (47) is forced into the cavity (57) through a port (13) and out of the cavity (57) through a different port (14). Heat generated by the semiconductor chips (41, 42, 43, 44, 45, and 46) is thermally conducted into the fin arrangement (16) and then transferred into the heat conducting medium (47).

42 citations

Journal ArticleDOI
TL;DR: In this paper, the authors used backscatter scanning electron microscopy (SEM) and optical microscopy to measure the growth rate of whiskers in high-temperature and high humidity conditions.
Abstract: Storage tests at elevated temperature and humidity conditions have been widely adopted as one of the major acceleration tests for Sn whisker growth. However, the driving force associated and the nucleation and growth process of whiskers are yet to be fully understood. In this paper, Sn whisker growth on Cu leadframe material at two different test conditions is compared. Both loose and board-mounted components were used. At each read point, the length and location of every whisker observed was recorded. Statistical characteristics and growth rate of the whisker population will be presented for each of the tests conditions. On loose components, corrosion of the Sn finish was observed near the tip and the dam bar cut area of the leads with backscatter scanning electron microscopy (SEM) and optical microscopy. The entire population of whiskers was located in these corroded areas, and there were zero whiskers located in the noncorroded areas on the same leads. On board-mounted components, the corrosion level of the Sn finish, as well as the whisker population and length was greatly reduced compared to those on the loose components. These results suggest that the corrosion of Sn finish in high-temperature and high-humidity conditions is the major driving force for whisker growth. The cause for the difference between the loose and board-mounted components is also analyzed

42 citations

Journal ArticleDOI
TL;DR: In this article, a strain-facilitated layer transfer is proposed, which avoids irradiation damage within the top Si layer that typically results from ion implantation used to create H trapping regions in the conventional ion-cut method.
Abstract: We have developed an innovative approach without the use of ion implantation to transfer a high-quality thin Si layer for the fabrication of silicon-on-insulator wafers. The technique uses a buried strained SiGe layer, a few nanometers in thickness, to provide H trapping centers. In conjunction with H plasma hydrogenation, lift-off of the top Si layer can be realized with cleavage occurring at the depth of the strained SiGe layer. This technique avoids irradiation damage within the top Si layer that typically results from ion implantation used to create H trapping regions in the conventional ion-cut method. We explain the strain-facilitated layer transfer as being due to preferential vacancy aggregation within the strained layer and subsequent trapping of hydrogen, which lead to cracking in a well controlled manner.

42 citations

Patent
12 May 2006
TL;DR: In this paper, a method of adaptively adjusting a QP of a video encoder to control output bit rate including estimating the QP based on a complexity of a previous frame and encoding bit rate information of a current frame to provide an estimated QP was proposed.
Abstract: A method of adaptively adjusting a QP of a video encoder to control output bit rate including estimating the QP based on a complexity of a previous frame and encoding bit rate information of a current frame to provide an estimated QP, determining a threshold value based on a video quality factor, a target bit rate and a complexity of a previous interval of the current frame or the same interval of the previous frame, and if the estimated QP is greater than the threshold value, adaptively adjusting the estimated QP using the threshold value, the target bit rate and the complexity of the previous interval. The method may include adaptively limiting a change of the QP between frame intervals based on a difference between the QP and the threshold value. Complexity information may be based on an average of minimum SAD values.

42 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
Network Information
Related Institutions (5)
STMicroelectronics
29.5K papers, 300.7K citations

92% related

Texas Instruments
39.2K papers, 751.8K citations

89% related

Intel
68.8K papers, 1.6M citations

87% related

Motorola
38.2K papers, 968.7K citations

86% related

Samsung
163.6K papers, 2M citations

83% related

Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267