Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Enhanced collapse solder interconnection

Abstract: A soldered electrical interconnection is made between a device and a circuit carrying substrate. A device (200) is formed with two solderable surfaces, the second solderable surface (204) adjacent to, but not touching, the first solderable surface (202). A sphere of solder (206) is placed upon a solderable surface (202) of the device and reflowed. The component and solder sphere assembly is placed on a circuit carrying substrate (210) and reflowed, such that the solder sphere reflows and is wetted to both solderable surfaces on the device.

Integrated circuit having standby control for memory and method thereof

Abstract: An integrated circuit (10) contains a central processing unit (CPU) (12) and a plurality of memory blocks (26-34) configured into one or more banks of memory A plurality of power control switches (38-42) are used to dynamically select which of a plurality of external voltage supply signals are provided to power each of the memory blocks (26-34) The power control switches (38-42) may be configured from software via writing the data to a register (24) or can be enabled by test control circuitry (22) or can be automatically enabled in response to VDD power voltage failure In addition, an intelligent controller can dynamically control the switches in response to execution flow of data accesses and instruction fetches from the memory banks so that only currently accessed memory banks or recently accessed memory banks are activated at a high power level while all other memory banks are in a low power stand-by mode

A comparison of heterogeneous video multicast schemes: Layered encoding or stream replication

Abstract: The heterogeneity of the Internet's transmission resources and end system capability makes it difficult to agree on acceptable traffic characteristics among the multiple receivers of a multicast video stream. Three basic approaches have been proposed to deal with this problem: 1) multicasting the replicated video streams at different rates; 2) multicasting the video encoded in cumulative layers; and 3) multicasting the video encoded in noncumulative layers. Even though there is a common belief that the layering approach is better than the replicated stream approach, there have been no studies that compare these schemes. This paper is devoted to such a systematic comparison. Our starting point is an observation (substantiated by results in the literature) that a bandwidth overhead is incurred by encoding a video stream in layers. We argue that a fair comparison of these schemes needs to take into account this overhead, as well as the specifics of the encoding used in each scheme, protocol complexity, and the topological placement of the video source and the receivers relative to each other. Our results show that the believed superiority of layered multicast transmission relative to replicated stream multicasting is not as clear cut as is widely believed and that there are indeed scenarios where replicated stream multicasting is the preferred approach.

An apparatus and method for auto-configuring a communication system

Abstract: A communications system 10 having an Asymmetric Digital Subscriber Line (ADSL) transceiver (24) is provided which may be configured either as a central office or a remote terminal in a system. The transceiver (24) operates in a listen/report idle state to report line activity to a host processor (22) prior to being configured as a central office or remote terminal. The host processor configures the transceiver (24) as a central office, remote terminal, or as otherwise specified based on the line activity.

One time programmable memory and method of operation

Abstract: A one time programmable (OTP) memory (10) has two-bit cells (14) for increasing density. Each cell (14) has two select transistors (20, 24) and a programmable transistor (22) in series between the two select transistors. The programmable transistor (22) has two independent storage locations (22). One is between the gate (48) and a first source/drain region (66) and the second is between the gate (48) and a second source/drain region (68). The storage locations (72) are portions of the gate dielectric (60) where the sources or drains (66, 68) overlap the gate (48) and are independently programmed by selectively passing a programming current (44) through them. The programming current (44) is of sufficient magnitude and duration to permanently reduce the impedance by more than three orders of magnitude of the storage locations (72) to be programmed. The programming current (44) is limited in magnitude to avoid damage to other circuit elements and is preferably induced at least in part by applying a negative voltage to the gate (48) of the programming transistor (22).