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Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
23 Apr 1996
TL;DR: In this article, a three-dimensional folded module has been proposed to reduce the overall footprint for interconnecting multiple semiconductor die by an approximate factor of four when compared to conventional electronic packaging.
Abstract: A three dimensional packaging approach reduces the overall footprint for interconnecting multiple semiconductor die. An three-dimensional folded module (10) produces a final package having a footprint size reduced by an approximate factor of four when compared to conventional electronic packaging. The module has a protective covering such as a cap (62) or a sealant (64) as a moisture barrier. Thus, high integration using flexible appendages (15, 25, 35, and 45) attached to a rigid substrate (12) and singularly folded above the substrate (12) results in both a small footprint package and also a light package. A reel-to-reel flex tape (56) assembly provides pre-tested flex boards (16, 26, 36, and 46) resulting in a cost-effective manufacturable package for semiconductor components.

99 citations

Patent
26 Jul 2004
TL;DR: Magnetic tunnel junction (MTJ) element structures and methods for fabricating MTJ element structures are provided in this paper, which includes a free layer (34) and a tunnel barrier layer (32) disposed between the amorphous fixed layer and the free layer.
Abstract: Magnetic tunnel junction ('MTJ') element structures and methods for fabricating MTJ element structures are provided. An MTJ element structure (10) may comprise a crystalline pinned layer (26), an amorphous fixed layer (30), and a coupling layer (28) disposed between the crystalline pinned layer and the amorphous fixed layer. The amorphous fixed layer (30) is antiferromagnetically coupled to the crystalline pinned layer (26). The MTJ element further comprises a free layer (34) and a tunnel barrier layer (32) disposed between the amorphous fixed layer and the free layer. Another MTJ element structure (60) may comprise a pinned layer (26), a fixed layer (30) and a non-magnetic coupling layer (28) disposed therebetween. A tunnel barrier layer (32) is disposed between the fixed layer (30) and a free layer (34). An interface layer (62) is disposed adjacent the tunnel barrier (32) layer and a layer of amorphous material (30). The first interface layer (62) comprises a material having a spin polarization that is higher than that of the amorphous material (30).

99 citations

Proceedings ArticleDOI
24 Jul 2006
TL;DR: This paper will look closely at the IEEE standard and the features that are natively part of the standard, including ZigBee networking and IPV6, and some of the various networking protocols that are proposed for or being used on top of this standard will be discussed.
Abstract: The concept of simple sensor nets, devices the size of ping-pong balls, sprinkled liberally on the ground, has been around for a long time. Some of the big challenges have always been cost and complexity, as well as power consumption. While there have been a plurality of proprietary wireless systems developed over the past decade or so for application to this problem, these systems have suffered from an inability to scale well in cost and network complexity. In 2003, the IEEE 802.15.4 standard was ratified, and almost immediately silicon manufacturers began producing compliant single-chip radios. Now, the next generation of transceiver is on the horizon, complete with microcontroller and FLASH memory, as well as the potential for various environmental sensors to be built right into the silicon itself. IEEE STD 802.15.4 specifies the RF, PHY and MAC layers, and there are a variety of custom and industry-standards based networking protocols that can sit atop this IEEE stack. These networking protocols allow the rapid creation of mesh networks that are also self-healing. With energy-saving features designed into the basic IEEE standard, and other possibilities applied by the applications developer, IEEE 802.15.4 radios have the potential to be the cost-effective communications backbone for simple sensory mesh networks that can effectively harvest data with relatively low latency, high accuracy, and the ability to survive for a very long time on small primary batteries or energy-scavenging mechanisms like solar, vibrational, or thermal power. This paper will look closely at the IEEE standard and the features that are natively part of the standard. Some of the various networking protocols that are proposed for or being used on top of this standard will be discussed, including ZigBee networking and IPV6. Practical sensor devices employing the technology will be analyzed and power consumption investigated. In addition, the ongoing updates to the standard taking place now within the IEEE will be discussed in light of their potential to make products developed to this standard even more useful to the sensor community.

99 citations

Patent
22 Oct 2009
TL;DR: In this paper, an identification tag is provided in which radio frequency (RF) circuitry and ultrawide bandwidth (UWB) circuitry are both provided on the same tag, along with some UWB-RF interface circuitry.
Abstract: An identification tag is provided in which radio frequency (RF) circuitry and ultrawide bandwidth (UWB) circuitry are both provided on the same tag, along with some UWB-RF interface circuitry. The RF circuitry is used to detect when the identification tag must be accessed, and is used to connect the UWB circuitry with a power supply. The UWB circuitry then performs the necessary communication functions with a distant device and the power supply is again disconnected. In this way the power supply is only accessed when the UWB circuitry is needed and it's usable lifetime can be maximized.

98 citations

Journal ArticleDOI
TL;DR: In this paper, an overview of the evolution of capacitor technology is presented from the early days of planar PIS capacitors to the MIM (metal/insulator/metal) capacitors used for todays 65 nm technology node.
Abstract: The architecture, materials choice and process technology for stacked-capacitors in embedded-DRAM applications are a crucial concern for each new technology node. An overview of the evolution of capacitor technology is presented from the early days of planar PIS (poly/insulator/silicon) capacitors to the MIM (metal/insulator/metal) capacitors used for todays 65 nm technology node. In comparing Ta2O5, HfO2 and Al2O3 as high-k dielectric for use in 65 nm eDRAM technology, Al2O3 is found to give a good compromise between capacitor performance and manufacturability. The use of atomic layer deposition (ALD) is identified to be an enabling technology for both high-k dielectrics and capacitor electrodes. � 2005 Elsevier Ltd. All rights reserved.

97 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267