Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..

Crossbar switch that supports a multi-port slave device and method of operation

Abstract: A crossbar switch ( 12 ) arbitrates for access from multiple bus masters ( 14, 16, 18, 20 and 22 ) to multiple addressed slave ports ( 3 and 4 ) that have overlapping address ranges. In one form, the address ranges are the same address range. The crossbar switch ( 12 ) uses shared slave port control circuitry ( 48 ), configuration registers ( 46 ) and slave port arbiter logic ( 34, 36, 38, 40, 42 and 44 ) to arbitrate for access when all the addressed ports are busy. A determination is made as to whether new access requests are higher or lower in priority than existing accesses. A determination on where to direct a new access request is made based upon a prediction of which of certain multiple accesses will complete first based on various factors including the number of data beats requested as well as wait state information. In one mode, the wait state information is determined dynamically.

Semiconductor device with a copper barrier layer and formation thereof

Abstract: A method of forming a semiconductor device by first providing a substrate in a processing chamber. The substrate has an insulating layer and an opening in the insulating layer. A copper barrier layer is formed on the insulating layer and in the opening by providing a plurality of refractory metal atoms and a plurality of silicon atoms in the processing chamber. The atoms are ionized by applying a first bias to the atoms to form a plasma. The substrate is then biased by a first stage bias followed by a second stage bias to accelerate the plasma to the substrate to form the copper barrier layer, where the first stage bias is less than the second stage bias. The copper-containing metal is then deposited on the copper barrier layer over the insulating layer and in the opening. The present invention further includes a semiconductor device formed by the above method.

A method of making an inverted-t channel transistor

Abstract: A method for creating an inverse T field effect transistor (10) is provided. The method includes creating a horizontal active region (14) and a vertical active region (16) on a substrate (12). The method further comprises forming a sidewall spacer (22) on a first side of the vertical active region and a second side of the vertical active region (16). The method further includes removing a portion of the horizontal active region (14), which is not covered by the sidewall spacer (22). The method further includes removing the sidewall spacer (22). The method further includes forming a gate dielectric (26) over at least a first part of the horizontal active region (14) and at least a first part of the vertical active region (16). The method further includes forming a gate electrode (28) over the gate dielectric (26). The method further includes forming a source region (30) and a drain region (32) over at least a second part of the horizontal active region and at least a second part of the vertical active region (16).

EPROM device using asymmetrical transistor characteristics

Abstract: An erasable programmable read only memory (EPROM) cell having a floating gate and a control gate where the floating gate and the control gate are deliberately offset or asymmetrical from the source/drain and drain/source regions in the substrate. During programming, the source region is the one spaced apart from the gates while the drain region is aligned thereto. This orientation produces high gate currents to provide faster programming. During a read operation the aligned region now becomes the source and the spaced apart region becomes the drain to provide high drain currents for fast access. The asymmetrical EPROM cells of the present invention may be readily made using conventional spacer technology.