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Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
20 Jan 2010
TL;DR: An electrostatic discharge (ESD) protection clamp (21, 21′, 70, 700) for protecting associated devices or circuits was proposed in this paper, in which doping of facing base (75) and collector (86) regions is arranged so that avalanche breakdown occurs preferentially within a portion (84, 85) of the base region (74, 75) of a device away from the overlying dielectric-semiconductor interface (791).
Abstract: An electrostatic discharge (ESD) protection clamp (21, 21′, 70, 700) for protecting associated devices or circuits (24), comprises a bipolar transistors (21, 21′, 70, 700) in which doping of facing base (75) and collector (86) regions is arranged so that avalanche breakdown occurs preferentially within a portion (84, 85) of the base region (74, 75) of the device (70, 700) away from the overlying dielectric-semiconductor interface (791). Maximum variations (ΔVt1)MAX of ESD triggering voltage Vt1 as a function of base-collector spacing dimensions D due, for example, to different azimuthal orientations of transistors (21, 21′, 70, 700) on a semiconductor die or wafer is much reduced. Triggering voltage consistency and manufacturing yield are improved.

61 citations

Patent
31 Mar 2005
TL;DR: In this paper, techniques for adjusting the dynamic range of an A/D converter in response to various conditions are disclosed. But they do not discuss the effect of these conditions on the performance of the converter.
Abstract: Techniques for adjusting the dynamic range of an A/D converter in response to various conditions are disclosed. A value output by the A/D converter is utilized to determine if the A/D converter is operating at or above its current dynamic range capabilities (i.e., the A/D converter is potentially “saturated” at its current dynamic range setting). If potentially saturated, the dynamic range of the A/D converter may be increased. If not, the dynamic range of the A/D converter may be decreased or may be unchanged. Alternately, an upcoming or enacted change in the gain settings of one or more gain stages that condition the analog signal input to an A/D converter may be used as a condition that results in an adjustment to the dynamic range of the A/D converter.

61 citations

Patent
07 Feb 1986
TL;DR: In this paper, the authors proposed to use the gate conductor to mask a high dose high energy implant which creates a thin dielectric region within the body of the common substrate beneath the source and drain regions, but not beneath the channel region.
Abstract: MOS transistors in which the source and drain contact are isolated from the common substrate are formed by using the gate conductor to mask a high dose high energy implant which creates a thin dielectric region within the body of the common substrate beneath the source and drain regions, but not beneath the channel region. For single crystal silicon substrates, oxygen and nitrogen are the preferred ions for use in forming the buried dielectric region. The conductive gate must be sufficiently thick so as to preclude the implanted oxygen or nitrogen ions from reaching the underlying gate dielectric or the portion of and channel region of the device will be substantially free the substrate beneath the gate. This ensures that the gate and channel region of the device will be substantially free of the implant damage which otherwise occurs during formation of the buried dielectric regions. Dielectric isolation walls are conveniently provided laterally exterior to the source-drain regions. The source-drain and gate regions are self-aligned to each other. Typical oxygen implant doses to form the buried dielectric layer are 1.7.-2.2×10 18 ions/cm 2 at an energy of about 150 KeV.

60 citations

Proceedings ArticleDOI
01 Apr 2007
TL;DR: In this article, the authors used deconvolution to show that SRAM Vmin shift statistics yield a spread that follows Poisson area scaling and a time and voltage dependence of t1/6 and V3, respectively.
Abstract: The paper shows using deconvolution, SRAM Vmin shift statistics yield a spread that follows Poisson area scaling and a time- and voltage-dependence of t1/6 and V3, respectively. This is demonstrated to be consistent with permanent NBTI shift (Si-H bond breaking) relevant for end-of-life extrapolation. In contrast recoverable NBTI shift (hole trapping/detrapping) is shown to be only a function of stress duty and can be very small for realistic product duties.

60 citations

Patent
08 Jan 2007
TL;DR: In this article, an epitaxially grown crystalline semiconductor layer comprising a combination of group-IV elements is annealed at a temperature substantially in a range of 1,000 to 1,400 degrees Celsius for a period not to exceed 100 milliseconds within 10% of the peak temperature.
Abstract: An anneal of an epitaxially grown crystalline semiconductor layer comprising a combination of group-IV elements. The layer contains at least one of the group of carbon and tin. The layer of epitaxially grown material is annealed at a temperature substantially in a range of 1,000 to 1,400 degrees Celsius for a period not to exceed 100 milliseconds within 10% of the peak temperature. The anneal is performed for example with a laser anneal or a flash lamp anneal. The limited-time anneal may improve carrier mobility of a transistor.

60 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267