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Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
26 Dec 2001
TL;DR: In this paper, an MRAM cell and a method of programming the cell are disclosed, which includes a free layer of magnetic material having a ferromagnetic resonance with a resonant frequency, the resonance having a Q greater than one.
Abstract: An MRAM cell and a method of programming the cell are disclosed. The cell includes a free layer of magnetic material having a ferromagnetic resonance with a resonant frequency, the ferromagnetic resonance having a Q greater than one. A hard axis and an easy axis write line are positioned in magnetic communication with the free layer. A cladding layer partially surrounds the hard axis write line and has a similar resonant frequency and with a ferromagnetic resonance Q greater than one. A write signal including the resonant frequency is applied to the hard axis write line and simultaneously a write pulse is applied to the easy axis write line. The Qs of the cell and the cladding layer multiply to substantially increase the switching magnetic field or reduce the current required to provide the same magnetic field.

57 citations

Journal ArticleDOI
01 Jun 2008
TL;DR: This paper describes the design case of a media processor targeting at H.264 decoder and other video tasks based on the ADRES template, and obtains C-programmed real-time H. 264/AVC CIF decoding at 50 MHz.
Abstract: Architecture for Dynamically Reconfigurable Embedded Systems (ADRES) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications which demand high-performance, low-power and high-level language programmability. Compared with typical very long instruction word-based digital signal processor, ADRES can exploit higher parallelism by using more scalable hardware with support of novel compilation techniques. We developed a complete tool-chain, including compiler, simulator and HDL generator. This paper describes the design case of a media processor targeting at H.264 decoder and other video tasks based on the ADRES template. The whole processor design, hardware implementaiton and application mapping are done in a relative short period. Yet we obtain C-programmed real-time H.264/AVC CIF decoding at 50 MHz. The die size, clock speed and the power consumption are also very competitive compared with other processors.

57 citations

Patent
08 Jun 1998
TL;DR: In this article, a method of preparing crystalline alkaline earth metal oxides on a Si substrate is presented, where a Si is heated to a temperature in a range of 700° C. to 800° C and exposed to a beam of alkaline metal(s) in a molecular beam epitaxy chamber at a pressure within approximately a 10 -9 -10 -10 10 Torr range.
Abstract: A method of preparing crystalline alkaline earth metal oxides on a Si substrate wherein a Si substrate with amorphous silicon dioxide on a surface is provided. The substrate is heated to a temperature in a range of 700° C. to 800° C. and exposed to a beam of alkaline earth metal(s) in a molecular beam epitaxy chamber at a pressure within approximately a 10 -9 -10 -10 Torr range. During the molecular beam epitaxy the surface is monitored by RHEED technique to determine a conversion of the amorphous silicon dioxide to a crystalline alkaline earth metal oxide. Once the alkaline earth metal oxide is formed, additional layers of material, e.g. additional thickness of an alkaline earth metal oxide, single crystal ferroelectrics or high dielectric constant oxides on silicon for non-volatile and high density memory device applications.

57 citations

Patent
01 Dec 1997
TL;DR: In this article, a method of chemical-mechanical polishing of a semiconductor device utilizes a combination of polishing steps, including a first step using a first slurry containing an abrasive component and a chemical component (i.e., chemical reactants).
Abstract: A method of chemical-mechanical polishing of a semiconductor device utilizes a combination of polishing steps, including a first step using a first slurry containing an abrasive component (i.e., mechanical component) and a chemical component (i.e., chemical reactants), and a second polishing step using a second slurry having a reduced amount of the abrasive component. The method is carried out with respect to metal (39), such as copper, deposited on a dielectric layer (34) and the first polishing step is stopped before the entirety of the metal overlying the dielectric layer is removed. In one embodiment, the second slurry has no abrasive component.

57 citations

Patent
01 May 1997
TL;DR: In this paper, the stencil and preform are aligned over the substrate to be bumped so that the preform aligns with a metal pad on the substrate, and the solder within the openings of a stencil is drawn onto the metal pad.
Abstract: Solder bumps are formed on a substrate, such as a semiconductor die (28) or wafer, using a screen printing and reflow operation. Solder paste (18) is screened into openings (14) of a stencil (10). The paste is reflowed within the stencil to produce a solder preform (22). The stencil and solder preforms are then aligned over the substrate to be bumped so that the preform aligns with a metal pad (30) on the substrate. The solder preforms are again reflowed, and the solder within the openings of the stencil is drawn onto the metal pad. To facilitate the transfer of the solder from the stencil to the metal pad, a second stencil (12) can be used to form a protrusion (27) on the solder preform. The protrusion contacts the metal pad during the transfer reflow operation to facilitate removing the solder from the stencil.

57 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267