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Institution

Freescale Semiconductor

About: Freescale Semiconductor is a based out in . It is known for research contribution in the topics: Layer (electronics) & Signal. The organization has 7673 authors who have published 10781 publications receiving 149123 citations. The organization is also known as: Freescale Semiconductor, Inc..


Papers
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Patent
05 Dec 1994
TL;DR: In this article, a method for forming an electrical interconnect on a substrate is described, where at least one pad (14) is formed on the substrate and the pad has a nonwetting surface (12) and a wettable surface (13).
Abstract: A method for forming an electrical interconnect on a substrate. At least one pad (14) is formed on a substrate (11). The pad (14) is formed having a non-wetting surface (12) and a wettable surface (13). Photoresist (44) is patterned on a substrate (41) forming a cavity on a pad (46) leaving a non-wetting surface (42) and a wettable surface (43) exposed. Interconnect material (56) is formed on a non-wetting surface (52) and a wettable surface (53) of pad 57. Interconnect material (56) is reflowed forming an interconnect ball (74) on a wettable surface (73). Surface tension causes interconnect material (56) when reflowed to flow from a non-wetting surface (72) to the wettable surface (73) and ball up to form the interconnect ball (74).

55 citations

Patent
19 Mar 2007
TL;DR: A signal processing device adapted for simultaneous processing of at least two process threads in a multi-processing manner is described in this article, which comprises a plurality of functional units capable of executing word- or subword-level operations on data.
Abstract: A signal processing device adapted for simultaneous processing of at least two process threads in a multi-processing manner is described. It comprises a plurality of functional units capable of executing word- or subword- level operations on data, a means for interconnecting said plurality of functional units, said means for interconnecting supporting a plurality of interconnect arrangements that can be dynamically switched, at least one of said interconnect arrangements interconnecting said plurality of functional units into at least two non- overlapping processing units each with a pre-determined topology, the signal processing device furthermore comprising at least two control modules, each control module being assigned to one of said processing units. The present invention also provides a method for executing an application on such a signal processing device, a method for compilation of application source code in order to obtain compiled code being executable on such a signal processing device, and to optimisation methods for applications to be executed on such a signal processing device.

55 citations

Journal ArticleDOI
TL;DR: In this article, a two-transistor floating-body cell (FBC) for embedded-DRAM applications is proposed and demonstrated via device/circuit simulations using a process/physics-based compact model, with numerical-simulation support.
Abstract: A novel two-transistor (2T) floating-body cell (FBC) for embedded-DRAM applications is proposed and demonstrated via device/circuit simulations using a process/physics-based compact model, with numerical-simulation support. Significant advantages of the 2T cell, in which the charged/discharged body of one transistor (1T) drives the gate of the other, over the currently popular 1T-DRAM FBC are noted and explained. Furthermore, a modification of the basic 2T-FBC structure, which in essence results in a floating-body/gate cell (FBGC), is shown to yield dramatic reduction in power dissipation in addition to better signal margin, longer data retention, and higher memory density. Design and processing issues that need to be addressed for optimal performance and for sustained FBGC viability in nanoscale CMOS are discussed.

55 citations

Patent
03 May 1990
TL;DR: In this article, a semiconductor device is disclosed having an electronic component mounted to a mounting surface opposite a heat transfer surface of a die support member, and an insertable thermally conductive heat sink extends into the opening in the package body making thermal contact with the heat transfer surfaces of the die support members.
Abstract: A semiconductor device is disclosed having an electronic component mounted to a mounting surface opposite a heat transfer surface of a die support member. The electronic component includes a plurality of bonding pads each electrically coupled to a plurality of package leads by a number of inner leads. A package body encloses the electronic component, the inner leads, the proximal ends of the package leads and the mounting surface of the die support member. The package body includes an opening exposing a portion of the heat transfer surface of the die support member. An insertable thermally conductive heat sink extends into the opening in the package body making thermal contact with the heat transfer surface of the die support member. A thermally conductive electrically insulating adhesive joins the heat sink to the package body securing the heat sink to the package body. In the assembly process, the package body is formed prior to attachment of the heat sink. During the process of soldering the package leads of the semiconductor device to a mounting substrate, gasses within the package body can escape through the opening before excessive pressure buildup occurs within the package body.

55 citations


Authors

Showing all 7673 results

NameH-indexPapersCitations
David Blaauw8775029855
Krishnendu Chakrabarty7999627583
Rajesh Gupta7893624158
Philippe Renaud7777326868
Min Zhao7154724549
Gary L. Miller6330613010
Paul S. Ho6047513444
Ravi Subrahmanyan5935314244
Jing Shi5322210098
A. Alec Talin5231112981
Chi Hou Chan485119504
Lin Shao4838012737
Johan Åkerman483069814
Philip J. Tobin471866502
Alexander A. Demkov473317926
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20211
20203
201910
201826
201779
2016267