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Institution

Hewlett-Packard

CompanyPalo Alto, California, United States
About: Hewlett-Packard is a company organization based out in Palo Alto, California, United States. It is known for research contribution in the topics: Signal & Layer (electronics). The organization has 34663 authors who have published 59808 publications receiving 1467218 citations. The organization is also known as: Hewlett Packard & Hewlett-Packard Company.


Papers
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Journal ArticleDOI
F.-C. Hsu1, S. Tam
TL;DR: In this article, a linear relationship is derived between the threshold shift, relative transconductance reduction, and the number of interface states generated, which provides a link between the electrical characteristics of a degraded device and its physical damages and therefore is a vital tool in the study of hot-electron-induced device degradation mechanisms.
Abstract: Device degradation due to hot-electron injection in n-channel MOSFET's is mainly caused by mobility degradation and reduced mobile charges in the channel introduced by interface-state generation. With the use of simple gradual-channel approximation (GCA), a linear relationship is derived between the threshold shift, relative transconductance reduction, and the number of interface states generated. This model provides a link between the electrical characteristics of a degraded device and its physical damages and, therefore, is a vital tool in the study of hot-electron-induced device degradation mechanisms.

199 citations

Patent
02 Oct 2003
TL;DR: In this article, a method of forming a MEMS device includes depositing a conductive material on a substructure, forming a first sacrificial layer over the conductive materials, including forming a substantially planar surface of the first layer, and forming a second element over the first element.
Abstract: A method of forming a MEMS device includes depositing a conductive material on a substructure, forming a first sacrificial layer over the conductive material, including forming a substantially planar surface of the first sacrificial layer, and forming a first element over the substantially planar surface of the first sacrificial layer, including communicating the first element with the conductive material through the first sacrificial layer. In addition, the method includes forming a second sacrificial layer over the first element, including forming a substantially planar surface of the second sacrificial layer, forming a support through the second sacrificial layer to the first element after forming the second sacrificial layer, including filling the support, and forming a second element over the support and the substantially planar surface of the second sacrificial layer. As such, the method further includes substantially removing the first sacrificial layer and the second sacrificial layer, thereby supporting the second element relative to the first element with the support.

199 citations

Journal ArticleDOI
TL;DR: This 64-b microprocessor is the second-generation design of the new Itanium architecture, termed explicitly parallel instruction computing (EPIC), and seeks to extract maximum performance from EPIC by optimizing the memory system and execution resources for a combination of high bandwidth and low latency.
Abstract: This 64-b microprocessor is the second-generation design of the new Itanium architecture, termed explicitly parallel instruction computing (EPIC). The design seeks to extract maximum performance from EPIC by optimizing the memory system and execution resources for a combination of high bandwidth and low latency. This is achieved by tightly coupling microarchitecture choices to innovative circuit designs and the capabilities of the transistors and wires in the 0.18-/spl mu/m bulk Al metal process. The key features of this design are: a short eight-stage pipeline, 11 sustainable issue ports (six integer, four floating point, half-cycle access level-1 caches, 64-GB/s level-2 cache and 3-MB level-3 cache), all integrated on a 421 mm/sup 2/ die. The chip operates at over 1 GHz and is built on significant advances in CMOS circuits and methodologies. After providing an overview of the processor microarchitecture and design, this paper describes a few of these key enabling circuits and design techniques.

199 citations

Journal ArticleDOI
TL;DR: OurGrid is an open, free-to-join, cooperative Grid in which labs donate their idle computational resources in exchange for accessing other labs’ idle resources when needed, and employs a novel application scheduling technique that demands very little information.
Abstract: eScience is rapidly changing the way we do research. As a result, many research labs now need non-trivial computational power. Grid and voluntary computing are well-established solutions for this need. However, not all labs can effectively benefit from these technologies. In particular, small and medium research labs (which are the majority of the labs in the world) have a hard time using these technologies as they demand high visibility projects and/or high-qualified computer personnel. This paper describes OurGrid, a system designed to fill this gap. OurGrid is an open, free-to-join, cooperative Grid in which labs donate their idle computational resources in exchange for accessing other labs’ idle resources when needed. It relies on an incentive mechanism that makes it in the best interest of participants to collaborate with the system, employs a novel application scheduling technique that demands very little information, and uses virtual machines to isolate applications and thus provide security. The vision is that OurGrid enables labs to combine their resources in a massive worldwide computing platform. OurGrid is in production since December 2004. Any lab can join it by downloading its software from http://www.ourgrid.org .

199 citations

Patent
14 Jul 1995
TL;DR: In this paper, a flexible patient monitoring system which interfaces a telemetry subsystem (100) with a communications network (205) by way of telemetry transmission receiving system (213, 214X, 224, 232) and a network controller (230) is presented.
Abstract: A flexible patient monitoring system which interfaces a telemetry subsystem (100) with a communications network (205) by way of a telemetry transmission receiving system (213, 214X, 224, 232) and a network controller (230). The telemetry subsystem (100) includes one or more monitoring instruments (101, 102; 201), a multiport transmitter (110; 210), a telemetry subsystem interface (112, 114; 212), a backchannel receiver module (113; 213), and a telemetry docking station (111; 211). Wireless communications between the telemetry subsystem (112, 114; 212) and various nodes on the network (205) are thus enabled. A backchannel communications link on a paging-based communications channel is provided to permit information to be transmitted from a node on the communications network (205) to the multiport transmitter (110; 210).

199 citations


Authors

Showing all 34676 results

NameH-indexPapersCitations
Andrew White1491494113874
Stephen R. Forrest1481041111816
Rafi Ahmed14663393190
Leonidas J. Guibas12469179200
Chenming Hu119129657264
Robert E. Tarjan11440067305
Hong-Jiang Zhang11246149068
Ching-Ping Wong106112842835
Guillermo Sapiro10466770128
James R. Heath10342558548
Arun Majumdar10245952464
Luca Benini101145347862
R. Stanley Williams10060546448
David M. Blei98378111547
Wei-Ying Ma9746440914
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20231
202223
2021240
20201,028
20191,269
2018964