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Institution

Indian Institute of Technology Indore

EducationIndore, Madhya Pradesh, India
About: Indian Institute of Technology Indore is a education organization based out in Indore, Madhya Pradesh, India. It is known for research contribution in the topics: Computer science & Chemistry. The organization has 1606 authors who have published 4803 publications receiving 66500 citations.


Papers
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Journal ArticleDOI
TL;DR: It is shown that ES is a generic phenomenon and can occur in any network by multiplexing it with an appropriate layer without even considering any prerequisite for the emergence of ES.
Abstract: To date, explosive synchronization (ES) in a network is shown to be originated from considering either degree-frequency correlation, frequency-coupling strength correlation, inertia, or adaptively controlled phase oscillators. Here we show that ES is a generic phenomenon and can occur in any network by multiplexing it with an appropriate layer without even considering any prerequisite for the emergence of ES. We devise a technique which leads to the occurrence of ES with hysteresis loop in a network upon its multiplexing with a negatively coupled (or inhibitory) layer. The impact of various structural properties of positively coupled (or excitatory) and inhibitory layers along with the strength of multiplexing in gaining control over the induced ES transition is discussed. Analytical prediction for the spread of phase distribution of each layer is provided, which is in good agreement with the numerical assessment. This investigation is a step forward in highlighting the importance of multiplex framework not only in bringing phenomena which are not possible in an isolated network but also in providing more structural control over the induced phenomena.

42 citations

Journal ArticleDOI
TL;DR: A metal-free-based one-shot synthesis of a medicinally promising polycyclic spirooxindole with an all-carbon spirocenter has been achieved with outstanding dr value (up to ≤99:1).
Abstract: An efficient, organocatalytic, and ecofriendly method has been developed for the quick construction of a wide array of 3,3-disubstituted oxindoles in good to excellent yields and diastereomeric ratio (up to ≤96:4) with excellent functional group tolerance via an allylic alkylation reaction of cyclic sulfamidate imines with a number of MBH carbonates of isatins in 2-MeTHF as an environmentally benign solvent at room temperature using 5 mol % of DABCO Furthermore, a metal-free-based one-shot synthesis of a medicinally promising polycyclic spirooxindole with an all-carbon spirocenter has been achieved with outstanding dr value (up to ≤99:1)

42 citations

Journal ArticleDOI
TL;DR: In this paper, the authors revisited the requirement of higher channel doping (≥1019 cm−3) in junctionless (JL) double gate MOSFETs.
Abstract: In this work, we revisit the requirement of higher channel doping (≥1019 cm−3) in junctionless (JL) double gate MOSFETs. It is demonstrated that moderately doped (1018 cm−3) ultra low power (ULP) JL transistors perform significantly better than heavily doped (1019 cm−3) devices. JL MOSFETs with moderate doping results in the spreading out of carriers across the entire silicon film instead of being localized at the center of the film. This improves gate controllability leading to higher on–off current ratio and lower intrinsic delay for ULP subthreshold logic applications. Additional benefits of using a channel doping concentration of 1018 cm−3 instead of conventional heavily doped design is the significant reduction in threshold voltage sensitivity values (by ~70–90%) with respect to film thickness and gate oxide thickness. Further improvement in ULP performance metrics can be achieved by limiting the source/drain implantation away from the gate edge. This design, specifically for ULP, allows the requirement of gate workfunction to be reduced from p+-poly (~ 5.1 eV) to near about midgap values (~ 4.8 eV). On–off current ratio and intrinsic delay for optimized JL devices are compared for low standby power projections of the technological roadmap. A 6T-SRAM cell operating at 0.8 V with 25 nm JL devices exhibits a static noise margin of 151 mV with gate workfunction offset of 0.2 eV with respect to midgap value (4.72 eV). The results highlight new viewpoints for realizing improved low power JL transistors.

42 citations

Journal ArticleDOI
TL;DR: In this article, the role of redox reactions taking place at the electrode/electrolyte interface has been identified using Raman and UV-Vis spectroscopies carried out during the device operation.

42 citations

Journal ArticleDOI
TL;DR: In this article, the authors investigated and identified the mechanisms by which a remolded expansive soil can be modified to reduce the upward pressure and swelling (heave) of pavement structures constructed on the expansive soil subgrade.

42 citations


Authors

Showing all 1738 results

NameH-indexPapersCitations
Raghunath Sahoo10655637588
Biswajeet Pradhan9873532900
A. Kumar9650533973
Franco Meddi8447624084
Manish Sharma82140733361
Anindya Roy5930114306
Krishna R. Reddy5840011076
Sudipan De549910774
Sudip Chakraborty513439319
Shaikh M. Mobin5151511467
Ashok Kumar5040510001
Ankhi Roy492598634
Aditya Nath Mishra491397607
Ram Bilas Pachori481828140
Pragati Sahoo471336535
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202365
2022253
2021918
2020801
2019677
2018614