scispace - formally typeset
Search or ask a question
Institution

KDDI

CompanyTokyo, Japan
About: KDDI is a company organization based out in Tokyo, Japan. It is known for research contribution in the topics: Base station & Terminal (electronics). The organization has 614 authors who have published 765 publications receiving 6439 citations.


Papers
More filters
Journal ArticleDOI
Keiji Tanaka1, A. Agata, Y. Horiuchi
TL;DR: The IEEE 802.3av 10G-EPON standardization work was completed in September 2009, and 10 Gbit/s Ethernet-based next-generation access is now proceeding to the next stage as mentioned in this paper.
Abstract: The IEEE 802.3av 10G-EPON Standardization work was completed in September 2009, and 10 Gbit/s Ethernet-based next-generation access is now proceeding to the next stage. We review key features of the IEEE 802.3av Specifications and its research and development status.

131 citations

Patent
Noriaki Miyazaki1, Toshinori Suzuki1
17 Feb 2004
TL;DR: In this article, a receiver informs a delay profile and CIR measured in an FDE or a Rake receiver, together with the bit error rate of a received signal that is required in a receiver, as quality information to a transmitter.
Abstract: A receiver informs a delay profile and CIR measured in an FDE or a Rake receiver, together with a bit error rate of a received signal that is required in a receiver, as quality information to a transmitter. In the transmitter, based on the delay profile and CIR contained in the notified quality information, a number of code division multiplex and a frame format are decided in a decision circuit such that a bit error rate of a received signal, which is necessary on the receiver side, can be obtained. In addition, a transmission selection switch selects one of a unique word insertion unit and a cyclic prefix insertion unit that create a frame format for FDE reception and a pilot insertion unit and a complex scrambling unit that create a frame format for Rake reception, and data is then transmitted.

117 citations

Patent
27 Jan 2003
TL;DR: In this article, a video information transmission apparatus for efficient transmission of MPEG video at real-time while controlling congestion on a QoS non-guaranteed IP network and suppressing degradation of a video quality is presented.
Abstract: This invention provides a video information transmission apparatus for efficiently transmitting a digital video such as MPEG video at real time while controlling congestion on a QoS non-guaranteed IP network and suppressing degradation of a video quality. A transmission control section 13 on a sender side outputs bit rate feedback information in accordance with congestion information on the network to a real-time encoder 12 , and controls a transmission bit rate to change the transmission bit rate in accordance with congestion information on the network. The bit rate feedback information is obtained based on the congestion information on the network on the sender side, or obtained on a receiver side and fed back.

96 citations

Patent
25 Aug 2005
TL;DR: In this paper, a wireless communication system, relay station device, and base station device reduce dead zones in which communication with the base station devices is not possible, and enable expansion of service areas.
Abstract: A wireless communication system, relay station device, and base station device reduce dead zones in which communication with the base station device is not possible, and enable expansion of service areas. The BS transmits to the RS burst packets and MAP messages including information providing notification of the timing of information transmission and reception. The RS receives the MAP messages and burst packets. The RS stores, in the Preamble Present bits in MAP messages, information providing notification of the preamble transmission timing to control synchronization of reception by the SSs, and transmits the MAP messages to the SSs. The RS transmits burst packets to which preambles are appended to the SSs.

94 citations

Journal ArticleDOI
TL;DR: A low-power write scheme which reduces SRAM power by 90% by using seven-transistor sense-amplifying memory cells and can also have the capability of leakage power reduction with small modifications is described.
Abstract: This paper describes a low-power write scheme which reduces SRAM power by 90% by using seven-transistor sense-amplifying memory cells. By reducing the bitline swing to V/sub DD//6 and amplifying the voltage swing by a sense-amplifier structure in a memory cell, the charging and discharging component of the power of the bit/data lines is reduced. A 64-kb test chip has been fabricated and correct read/write operation has been verified. It is also shown that the scheme can also have the capability of leakage power reduction with small modifications. Achievable leakage power reduction is estimated to be two orders of magnitude from SPICE simulation results.

82 citations


Authors

Showing all 615 results

NameH-indexPapersCitations
Takehiro Tsuritani364034233
Dinh Duc Nguyen352324313
Satoshi Konishi324816725
Hideaki Tanaka301383139
Takashi Yano302373682
Hideaki Tanaka283283590
Toshiaki Tanaka263392992
Masatoshi Suzuki241801857
Shu Yamamoto221441602
Jun Haeng Lee221022007
Akio Yoneyama211521710
Fumihide Kojima212932959
Mikio Kuwahara21691429
Noboru Edagawa20841625
Nobukazu Doi201111727
Network Information
Related Institutions (5)
Nippon Telegraph and Telephone
22.3K papers, 430.4K citations

85% related

Nokia
28.3K papers, 695.7K citations

83% related

Ericsson
35.3K papers, 584.5K citations

83% related

Fujitsu
75K papers, 827.5K citations

82% related

NEC
57.6K papers, 835.9K citations

82% related

Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20231
20222
202118
202018
201946
201840