Mitsubishi

About: Mitsubishi is a company organization based out in Tokyo, Japan. It is known for research contribution in the topics: Signal & Layer (electronics). The organization has 53115 authors who have published 54821 publications receiving 870150 citations. The organization is also known as: Mitsubishi Group of Companies & Mitsubishi Companies.

Novel vector control system using deadbeat controlled PWM inverter with output LC filter

Abstract: This paper proposes a novel high-performance vector control system of an ac motor using a low-switching-frequency (2 kHz) pulsewidth-modulation voltage-source inverter with an output LC filter. Excellent high-speed response characteristics of the LC filter output voltage have been realized using a novel deadbeat control algorithm. As for the experimental results, the torque current response that is similar to the response of the conventional system without an LC filter has been obtained. In addition, it has been confirmed by simulation that errors of the LC filter constants within /spl plusmn/10% can be permitted.

Lead frame and semiconductor device

Abstract: A lead frame includes a die pad for mounting thereon a semiconductor chip having a plurality of electrodes, a plurality of leads for electrical connection with the plurality of electrodes of the semiconductor chip, an outer frame disposed on the periphery of the die pad for supporting the die pad and the plurality of leads, and a resin guide portion extending to the vicinity of the die pad from the outer frame for guiding molten resin over and under the semiconductor chip during resin packaging A semiconductor device manufacturing method includes mounting a semiconductor chip having electrodes on a substrate having a resin guiding portion for guiding a resin over and under the semiconductor chip during resin packaging; electrically connecting leads on the substrate to the electrodes; positioning the semiconductor chip and the substrate between a pair of mold halves injecting a molten resin into the mold to fill the cavity; and solidifying the resin

An 8.8-ns 54/spl times/54-bit multiplier with high speed redundant binary architecture

Abstract: A high speed redundant binary (RB) architecture, which is optimized for the fast CMOS parallel multiplier, is developed. This architecture enables one to convert a pair of partial products in normal binary (NB) form to one RE number with no additional circuit. We improved the RB adder (RBA) circuit so that it can make a fast addition of the RB partial products. We also simplified the converter circuit that converts the final RE number into the corresponding NE number. The carry propagation path of the converter circuit is carried out with only multiplexer circuits. A 54/spl times/54-bit multiplier is designed with this architecture. It is fabricated by 0.5 /spl mu/m CMOS with triple level metal technology. The active area size is 3.0/spl times/3.08 mm/sup 2/ and the number of transistors is 78,800. This is the smallest number for all 54/spl times/54-bit multipliers ever reported. Under the condition of 3.3 V supply voltage, the chip achieves 8.8 ns multiplication time. The power dissipation of 540 mW is estimated for the operating frequency of 100 MHz. These are, so far, the fastest speed and the lowest power for 54/spl times/54-bit multipliers with 0.5-/spl mu/m CMOS.