Showing papers by "Motorola published in 1972"

Switching regulator sweep starting protection circuit

Abstract: An overload protection system for a switching power supply includes a variable rate and variable pulse duration drive source for operating the switching transistor. Upon turn-on of the power supply, the switching transistor is driven with low repetition rate pulses having a predetermined time duration. The rate is gradually increased to a normal operating rate to minimize turnon transients. Load sensing circuitry is used in conjunction with the variable rate drive source to cause the drive source to operate at the low rate in the event that an overload is applied to the power supply, and to turn off the drive source if the overload persists. Circuitry for providing automatic reset following an overload is employed. A feedback circuit is used to vary the duration of the drive pulses to provide automatic voltage regulation.

Voltage level shifting circuit

Abstract: A voltage level shifting circuit includes a pair of transistors of one conductivity type arranged in a bistable configuration, and a pair of transistors both of another conductivity type each arranged as a switch for operating the bistable circuit. One of the two switches is operative to conduct in response to a first voltage or reference potential. The bistable is operative in response to the first switch being conductive to switch to a first state and couple the reference potential to the output. The bistable is operative in response to the second switch being conductive to switch to the second state and couple a second voltage greater than the first voltage to the output.

Long-range order and ordering kinetics in CoPt 3

Abstract: The Co-Pt system is well suited for studies of order-disorder by field-ion microscopy. Because of this, and the fact that detailed information on ordering is available for only one Ll2 alloy (Cu3Au), an extensive X-ray study was made of CoPt3. Long-range order falls to lower values (S ≈ 0.64) in this alloy than in Cu3Au. There is a two-phase field nearTc (685°C) extending for about 20°C. The ordered phase has a smaller lattice parameter than the disordered phase close toTc, but at room temperature the reverse is true. Ordering (when the domain size is large) follows Rothstein’s kinetic theory, with an activation energy of 74.0(9) kcal per g-atom. Domain growth is similar to grain growth, with a time exponent of about 0.45 and an average activation energy of about 62 kcal per g-atom. The antiphase domain structure is isotropic, in contrast to Cu3Au. There is little difference in atomic volume of cobalt and platinum in the ordered state as compared to the pure elements.

Digital pattern detector

Abstract: A detector for detecting a predetermined digital pattern having a predetermined number of bits employing a shift register having one stage more than the number of bits making up the predetermined digital pattern to serially receive the pattern. The first, last and selected intermediate stages of the shift register are sampled and compared with the contents of a second register having a predetermined pattern stored therein. The transitions of the pattern to be detected determine the stages of the shift register that are to be selected for sampling and the pattern to be stored in the second register. Comparison circuitry that provides a "+1," "0" or "-1" each time a bit from the shift register is compared to a bit stored in the second register is employed. An up-down counter is used to sum the signals from the comparison circuitry. The count in the counter is indicative of the received pattern, and reaches a predetermined value only upon receipt of the predetermined pattern.

Liquid silica source for semiconductors liquid silica source for semiconductors

Abstract: THERE IS DISCLOSED A LIQUID SILICA SOURCE FOR SEMICONDUCTOR DIFFUSIONS WHICH COMPRISES IN COMBINATION 54-64% ETHYL ALCOHOL, 11-21% ETHYL ACETATE, 13-63% TETRAETHYLORTHOSILICATE, AND 3-10% WATER AND 1-8% VINYL TRICHLOROSILANE, SAID PERCENTAGES BEING BY WEIGHT. THE LIQUID SILICA SOURCE MAY BE READILY COATED ONTO THE SEMICONDUCTOR WAFER EITHER BY PAINTING, SPRAYING OR PERFERABLY SPINNING.

Methods of forming self aligned transistor structure having polycrystalline contacts

Abstract: Disclosed are three processes, which all employ a common sequence of steps, for forming discrete and integrtated circuit transistors having emitters self-aligned between base enhancements and various polycrystalline silicon contacting members. The first process forms transistors having polycrystalline emitter contacts. The second process employs anisotropic etching techniques for forming self-aligned, integrated circuit transistors having polycrystalline emitter and collector contacts along with shallow isolation and collector buried layer contacting diffusions. The third process provides a transistor having polycrystalline silicon contacts to the emitter and base enhancement regions and utilizes boron doped polycrystalline silicon base contacts as an etch stop.

Method of making a semi planar insulated gate field-effect transistor device with implanted field

Abstract: A semi-planar insulated gate field effect transistor integrated circuit device having an ion implanted field region to achieve high field inversion voltage. The field effect transistor is fabricated on an elevated region of P-type silicon surrounded by and aligned to an implanted P-type field region. A thick field oxide layer on the implanted P-type field region surrounds and extends somewhat above the elevated region of P-type silicon in which the field effect transistor is fabricated. The field effect transistor includes N+ source and drain regions, a gate oxide insulator, a gate electrode and an interconnect metal layer provided in the elevated active region of P-type silicon. The method of manufacturing includes thermally growing a high integrity oxide layer on the P-type substrate, depositing a layer of nitride thereon, and removing the nitride over the field region, thereby leaving nitride over the active region of the silicon. The surface of the device is bombarded with boron ions to produce an implanted layer in the field region, with the nitride serving as an implant mask. The boron ions are then redistributed by application of a heat cycle. A thermal oxidation step increases the thickness of the oxide over the field, causing a deeper implanted P-type field region to be formed. The surface concentration of the implanted field region is increased by a subsequent heat cycle to compensate for boron ions depleted at the oxide-silicon interface during the oxidation cycle. The oxide formed on the nitride is removed and the field effect transistor is provided in the active region in a conventional manner.

Mos voltage reference circuit

Abstract: A MOS voltage regulator circuit produces a regulated voltage at an output node. A reference circuit including first and second MOSFETs connected in series between ground and a power supply produces an internal reference voltage. The internal reference voltage is sensed by a feedback circuit including a diode-connected MOSFET and is regulated thereby. The internal reference voltage is applied to an output circuit including a pullup MOSFET and a pulldown diode-connected MOSFET which produce a regulated output voltage.

Automatic signal acquisition means for a phase locked loop with anti-sideband lock protection

Abstract: The acquisition means includes a voltage controlled oscillator, comparison means for comparing an input signal to a signal from the voltage controlled oscillator, filtering means and a summing network connected in a phase-locked loop and providing an output signal at an output thereof at the input of said summing network, a signal multiplying network connected to receive the input signal and a signal from the VCO of the phase-locked loop and providing an output signal approximately 90 degrees out of phase with the output signal of the phase locked loop and two all pass networks connecting the output signals from the multiplying network and the phase locked loop to two inputs of a multiplier which has an output connected to the summing network, the all pass networks being designed to shift the phases of the signals so that they are in phase when applied to the multiplier.

Light-emitting and light-receiving logic array

Abstract: A logic array having a plurality of light emitters, each emitter producing light of one of a plurality of wavelengths in response to an input electronic signal. The light emitted, of one of a plurality of wavelengths, is detected by at least one of a plurality of light receivers, responsive to the one wavelength. The output of each of the light receivers can be combined to produce an output electronic signal when predetermined ones of the light receivers respond to the emitted light.

Vertical channel junction field-effect transistors and method of manufacture

Abstract: The disclosed junction field-effect transistor (FET) has a precisely controlled gate configuration which enables either high power operation or high frequency operation or both. The FET is manufactured by steps including the growing of a first epitaxial layer having a predetermined crystallographic orientation on a substrate to form a drain. Next, a first anisotropic etch of the epitaxial layer provides "U"-shaped grooves with flat bottoms, therein through which a gate is diffused having internal side walls of uniform depth that define the source-to-drain channel. A second epitaxial layer is then grown on the surface of the first epitaxial layer and of the gate to provide a source. A second anisotropic etch exposes a portion of the gate, which also forms an etch stop, to facilitate electrical contact thereto. Current flowing through the channel is controlled in response to an input signal applied between the gate and source which adjusts the thickness of a depletion region extending into the channel.

Liquid phase deposition of thin insulating and refractory film on a substrate

Abstract: It is known to deposit zirconium dioxide, ZrO2, on a substrate comprising a chip or wafer by providing zirconium oxychloride, ZrOCl2, vapor at about 550 DEG C, the chip or wafer being at 450 DEG C, in an atmosphere containing water vapor. Zirconium dioxide, ZrO2, and hydrochloric acid, HCl, are produced and a layer of the ZrO2 is deposited on the chip. The ZrO2 layer acts as a passivation material having high resistivity and very good impermeability to sodium which can be destructive of the circuit on the chip or wafer. According to this invention, the ZrO2 may be deposited on a substrate at a lower temperature from a liquid solution of the zirconium oxychloride, whereby the substrate may be paper or plastic and whereby the substrate if it includes a circuit will not be injured by the temperature needed by the prior art high temperature treatment, and therefore the possible injury to the substrate or to the circuit therein by the prior art high temperature treatment is avoided.

Enhancement of breakdown properties of overlay annular diodes by field shaping resistive films

Abstract: Breakdown voltage of oxide masked and passivated overlay annular diodes are limited in magnitude and stability by locally high fields in the surface junction region. Topologically, it is demonstrated that these high field regions are influenced by both the overlay radius of curvature and the overlay to annular ring spacing. Breakdown voltages approaching bulk values are achieved only with much reduced average surface fields, requiring excessive area. The use of a highly resistive but essentially ohmic film over the oxide in the high field surface region can shape and homogenize the surface fields. The use of 2000 A polycrystalline silicon layers with sheet resistances in excess of 10 10 Ω/□ for the field shaping element is shown experimentally to lead to reduced surface spacings for a given breakdown voltage and less tendency for surface arcing.

Two-way door assembly for a cassette tape player

Abstract: A two-way door assembly for a cassette tape player includes a door mounted at a first end for rotation about an independently rotatable support shaft. A first biasing spring is coupled to the door to bias the latter in a first rotational direction to a normally closed condition. A cassette inserted into the player tensions the first biasing spring. The spring returns the door to the closed condition subsequent to full insertion of the cassette into the player. When ejected, the movement of the cassette rotates the door in the opposite direction. A coupling pin extending from the support shaft is engaged by the door to rotate the shaft against a second biasing spring to tension the latter. Once the cassette is ejected, the second biasing spring rotates the shaft and door to their normal conditions.

Capacitance multiplier and filter synthesizing network

Abstract: A circuit using a differential amplifier multiplies the capacitance of a discrete integrating capacitor by (R1 + R2)/R2 where R1 and R2 are values of discrete resistor coupling an input signal e1 to the amplifier inputs. The output eo of the amplifier is fed back and added to the signal coupled by the resistor R2 to the amplifier through a resistor of value R1. A discrete resistor Rx may be connected in series for a lag filter and a discrete resistor may be connected in series with the capacitor for a lead-lag filter. Voltage dividing resistors Ra and Rb may be included in the feedback circuit of the amplifier output eo to independently adjust the overall circuit gain ei/eo.

Low parasitic microwave package

Abstract: A low parasitic microwave transistor package is provided with a pair of parallel rectangular bonding rails extending from the metal header. A first insulating body having a metal film thereon is positioned closely between the two rails and is attached to the header. A microwave transistor die may be attached to the metal film on the insulating body. A second insulating body having an aperture therein is attached to the metal base, the aperture accommodating the two bonding rails and the first insulating body positioned therebetween. The alumina disk has two metal bonding pads formed thereon. A very low inductance, low resistance connection from the emitter of a transistor to the metal base may be provided by means of a plurality of parallel stitch bonds from the emitter bonding pads on the transistor die to the bonding rails. Balanced feeding may be provided to the emitter, base and collector.

Electromigration resistant semiconductor contacts and the method of producing same

Abstract: A technique of reducing the susceptibility of aluminum semiconductor contacts to electromigration. Aluminum contacts containing a small percentage of copper therein are formed on a semiconductor device by evaporation techniques. Subsequently the device is heated to a temperature of greater than 400 DEG to alloy the copper into the aluminum and quickly cooled to form copper rich precipitates between the grains of aluminum along the grain boundaries and triple points thereof for the purpose of reducing electromigration along grain boundaries.

Acoustic transducer including piezoelectric driving element

Abstract: A disk shaped piezoelectric element constructed to operate in a planar mode so as to define a first overtone nodal ring on one of the major surfaces, a conically shaped diaphragm having a truncated apex defining a generally circular area affixed to a major surface of the element concentric with the nodal ring and spaced radially therefrom so as to reduce the amplitude of the output of the first overtone to approximately the amplitude of the output of the fundamental frequency, and a rubber disk affixed to the opposite major surface of the piezoelectric element to lower the fundamental resonance frequency and damp the peak output of the fundamental and first overtone resonance frequencies to provide a flat response over a desired bandwidth.

Printed circuit board edge connector requiring zero insertion force

Abstract: An edge connector for a printed circuit board or the like wherein substantially zero insertion force is required upon inserting such circuit board at a predetermined angle to the connector body, but wherein when the circuit board is pivoted to a substantially horizontal position, contact spring members included in the connector device engage conventional connection tabs positioned along the inserted edge of the printed circuit board to establish an optimum low resistance connection therebetween. Three embodiments of the edge connector device are shown and described.

Liquid diffusion dopant source for semiconductors

Abstract: THERE IS DISCLOSED A LIQUID DIFFUSION DOPANT SOURCE FOR SEMICONDUCTOR DIFFUSIONS WHICH COMPRISES IN COMBINATION 54-64% ETHYL ALCOHOL, 15-25% ETHYL ACETATE, 7-17% TETRAETHYLSILICATE, 3-10% WATER AND 0.1-10% OF A DOPING ATOM SORUCE SELECTED FROM THE GROUP CONSISTING OF THE COMPOUNDS OF ARSENIC, PHOSPHORUS, BORON ANTIMONY, ZINC, ALUMINUM, PLATINUM, GOLD AND GALLIUM. THE LIQUID DOPANT SOURCE MAY BE READILY COATED ONTO THE SEMICONDUCTOR WAFER EITHER BY PAINTING, SPRAYING OR PREFERABLY SPINNING. AFTER DRYING OF THE COATING, DIFFUSION OF THE DOPANT ATOMS INTO THE WAFER IS READILY CONDUCTED IN A STANDARD DIFFUSION FURNACE.

Single ramp analog to digital converter with feedback

Abstract: The ramp voltage of an analog to digital converter is started at a point below zero and the output of a pulse generator is gated into a counter when the ramp voltage passes through zero The pulse generator gate is closed when the ramp voltage passes through an unknown analog voltage to be measured or a reference voltage A calibration cycle is incorporated wherein a known reference voltage should be represented by a known number of pulses When the number of pulses is too high, the pulse generator may be slowed down or the rate of increase of ramp voltage may be speeded up If there are too few pulses, the pulse generator may be speeded up or the rate of change of ramp voltage may be slowed down

Digital phase shifter/synchronizer and method of shifting

Abstract: An electronic synchronizer for snychronizing the output pulse rate of an electronic clock with an input pulse train. The synchronizer provides a sampling signal output at a desired time within the time period of a single pulse of the input pulse train. The synchronizer phase-shifts the sampling signal by one-half of 1 clock cycle to either slow or speed the sample time, when required. A method of synchronizing by phase shifting the sample signal by one-half of 1 clock cycle is also disclosed.

Peripheral circuitry for dynamic mos rams

Abstract: Improved circuits for a dynamic MOS RAM having a storage array of inverting storage cells, including an improved input buffer, an improved write circuit, and a sense circuit. The input buffer circuit includes a dynamic latch circuit clocked by the first clock complement signal and is compatible with TTL logic levels. The cross coupled gate nodes of the dynamic latch are conditionally discharged by circuitry which includes a ratio type first address inverter, and a second ratio type address inverter followed by a third ratioless inverter, whose output conditionally discharges one of the cross coupled gate nodes of the dynamic latch. A separate write circuit drives each digitsense column bus line, and includes a push-pull driver clocked by the third clock input signal. The pull-up and pull-down field effect transistors of the push-pull driver each have an exclusive OR type circuit for conditionally discharging the prepcharged gate electrodes of the pull-up and pull-down field effect transistors, depending on the voltages on the data input signal and the data control signal. The ratioless data control inverter and the data input inverter provide the complement signals required by the two exclusive OR type circuits.

Communication system with portable units connected through a communication channel to a computer for applying information thereto

Abstract: System for indicating the condition of hotel rooms or the like having a computer coupled to a memory and to display devices, with a communication channel extending from the computer to remote points, such as individual hotel rooms. A portable unit is carried by a maid or other personnel and is adapted to be coupled to a communication channel which may be present for another purpose. For example, the communication channel may be the telephone lines which provide telephone service to the rooms, a television antenna cable, or any other communication channel which is available. The portable unit includes a circuit for transmitting and receiving signals, and switches coupled thereto. When used with a telephone line, the portable units can be coupled thereto through an acoustic coupler, or a receptacle can be provided for the unit which is directly wired to the line. The portable unit or the receptacle can also include a circuit which is uniquely wired or switched for each room, so that a signal can be sent on the line which identifies the room and the particular portable unit, and which provides information representing the operation of the switches of the portable unit. The portable unit may include batteries for energization of the circuit therein. The information supplied on the communications line is coupled to the computer and stored in the memory thereof, and selectively read out on a visible display and/or printer as desired.

Integrated current supply circuit

Abstract: DC biasing currents for a monolithic integrated circuit are obtained from a single regulated current reference source supplying current through first and second series connected diodes to establish points of reference potential. Some of the current source transistors which are referenced to this regulated current source have the base-emitter junctions thereof connected across the first diode, and the emitter current of these current source transistors is collected and added to the current from the regulated current source and supplied through the second diode. This second diode, with a larger regulated current flowing therethrough, is used to reference additional current source transistors for substantially larger currents without necessitating the use of high ratio area scaling of the emitter areas of these current source transistors.

Integrated circuit device employing metal frame means with preformed conductor means

Abstract: Wire bonding is eliminated in the assembly of microelectronic devices, by a process involving the direct bonding of circuit electrodes to an unsupported metallic sheet-frame member having a plurality of inwardly extending leads. A single-step vibratory pressure welding technique is employed for the simultaneous bonding of all leads to a semiconductor integrated circuit chip. Lateral confinement of the leads during the bonding steps causes a buckling action to introduce a small but critical loop in each lead to ensure clearance between the lead fingers and the perimeter of the semiconductor chip, whereby electrical shorting is avoided. The loop also provides a structural flexibility in the leads, which tends to protect the bonding sites from excessive stresses. Subsequently, the first frame member including the bonded circuit is attached, preferably by resistance welding, to a second lead frame member of heavier gage and increased dimensions, suitable for connection with external circuitry. Excess portions of the first frame member are then removed, providing a completed assembly for packaging; e.g., plastic encapsulation or hermetic sealing, as in a ceramic-glass flat package.

Battery connecting structure for portable device

Abstract: Battery operated portable device having one-piece conductors for connecting the device to a rechargeable battery, with external contact portions for engaging charging contacts to permit charging while the battery is within the housing of the device. The conductors provide connections from the device to a single use battery, but do not provide connections for charging such battery, to thereby prevent damage by accidental charging. The conductor structure provides the charging connection through a diode to prevent discharge of the battery by shorting the external contact portions. A connection is provided to a control terminal of the battery, in addition to the energizing terminals. The conductors are single flat strips having a resilient portion for engaging a contact of the battery, an integral contact for engaging the charger contact and an integral tab for connection to the energized device.

Sequential tone signalling system

Abstract: A selective calling sequential tone signalling system for transmitting and receiving predetermined coded messages. A base station and at least one mobile station is provided, and message, status, automatic status and identification codes comprising predetermined format sequences having seven tones each are transmitted therebetween. Automatic message acknowledgment is provided for message receipt verification, and apparatus is provided for substantially eliminating false reception of signals having an improper format.

Digital wave synthesizer

Abstract: A digital wave synthesizer provides an output waveform of frequency f in response to an input of periodic pulses from a clock source at a frequency of 2nf. The periodic pulses are received by a simple binary counter of n stages which provides n outputs, each from one stage, in a time sequence in accordance with the count of the counter. A code converter receives each of the n outputs from the counter and also the periodic pulses, combines them and provides 2n unique output signals. An output circuit comprised of a resistive ladder network receives the 2n output signals and provides 2n voltage signals at predetermined levels which, in sequential occurrence, produce the symmetrical waveform output.