Showing papers by "Motorola published in 1973"

Radio telephone system

Abstract: A portable duplex radio telephone system includes at least one base station transmitter having a predetermined base transmission range, and a plurality of portable or mobile units each having a predetermined portable maximum transmission range predeterminately shorter than the base transmission range. Satellite receivers are deployed about the base station within the base station transmission range for receiving transmissions from the portable units. The base station transmitter transmits signals on a signalling channel and on at least one communications channel. Each transmitter signalling and communications channel has a frequency that is paired or associated with a receiving frequency of the satellite receivers. In a multiple base station system, the portable receiver has means for scanning the base station transmitter signalling frequencies and for tuning the portable transmitter to the signalling frequency associated with the frequency of the strongest signalling signal received from the base transmitter. When communication is initiated, the portable transmitter and receiver are automatically retuned to one of the communications channels as determined by the strongest signalling frequency received by the portable receiver and by channel availability. Means are also provided in the system to continuously locate a portable unit and switch the operating frequency thereof as the portable unit moves between base station transmitter coverage areas. Further means are provided to automatically reduce the output power of each portable transmitter to the minimum level required for satisfactory communications in order to reduce battery drain and the interference caused by the portable transmitters.

Electrically Active Stacking Faults in Silicon

Abstract: The influence of oxidation induced stacking faults on the electrical characteristics of p‐n junctions in silicon has been studied by employing scanning and transmission electron microscopy in conjunction with electrical measurements. Diodes were fabricated with a junction depth and an integrated boron concentration of ohm‐cm n‐type epitaxial silicon.The presence of decorated stacking faults in the field region of the diodes examined is found to introduce excess reverse leakage currents in the junction. However not all faults introduce the same degree of leakage and the electrical activity of the faults is found to vary. The concept of the "threshold voltage" of a stacking fault is introduced which is a measure of the specific electrical activity of the fault. Electrically active faults introduce excess reverse currents in the diodes which are characterized by a relationship between the reverse log ratio measured at low voltages and the characteristic "threshold voltage" of the faults. The electrical activity is related to both the size and the structure of the faults. The smaller faults which are also more prone to impurity decoration are electrically more active than larger faults which are decorated to a lesser degree. Models are presented to account for the electrical activity of the faults. These models are based on the strain effects of the decorated faults and on the distortions produced in the p‐n junctions by the presence of faults.

Rapid battery charging system and method

Abstract: A thermistor is internally mounted in a sealed nickel cadmium battery to be charged so as to sense the internal temperature of the battery and is electrically connected in a bridge to provide an electrical indication of the temperature of the battery. The electrical signal from the bridge is differentiated once to provide a signal representative of the rate of change of the temperature. A fast charging current is applied to the battery when the differentiated signal is below a predetermined amplitude and the temperature of the battery is within a predetermined range.

Method of manufacturing a light coupled monolithic circuit by selective epitaxial deposition

Abstract: There is disclosed a monolithic light coupled circuit and method of manufacture. In its elemental form, the monolithic circuit comprises a light or photo emitting diode and a light or photo sensitive diode formed integrally in a semiconductor chip with means for coupling the light from the photo emitting diode to the photo sensitive diode. Suitable leads are provided for connecting the photo emitting diode to an input circuit and the photo sensitive diode to an output circuit. In a more complex form, the monolithic structure may include a suitable discriminator detector circuit for the input and suitable driver amplifier circuit for the output.

Building penetration loss at 900 MHz

Abstract: Building penetration loss was measured at 937 MHz in an urban environment using a new method which unlike previous methods takes into account many of the variables present in an actual portable radio system. A 900 MHz portable transceiver was used to transmit a signal to a calibrated receiver connected to a 8.5 dB gain base station antenna. Measurements were made in buildings of the class 1 type (greater than 100' x 100' or higher than 4 floors). The buildings varied in age from 1 to 50 years. A comparison was made between signal strengths at the same height inside and outside the building, as well as comparing outside street level signals with signals in the building at different floor levels. Conclusions are drawn as to the effects of height above street level, type of building construction, and outside environment with respect to the base station, on building penetration loss.

System and process for deposition of polycrystalline silicon with silane in vacuum

Abstract: SYSTEM AND PROCESS FOR DEPOSITION OF POLYCRYSTALLINE SILICON WITH SILANE IN VACUUM ABSTRACT OF THE DISCLOSURE The present invention is directed to the method and means for depositing polycrystalline silicon from silane in a vacuum. This process contemplates the use of a gas source and a means for assuring a uniform flow of gas into the deposition chamber. The deposition chamber is a hot wall furnace. The deposition zone is kept at as uniform a tem-perature as possible. The preferred temperature is 600°Cwith a workable range extending from 600°C to 700°C. While the deposition zone is profiled flat from a temperature point of view, the deposition rate over the length of the tube appears as a flattened curve. This means that at the source and exhaust portions of the tube, the deposition rates are different from that rate in the central flattened portion. The boat upon which the wafers are placed is centered within the center portion of the curve along its flattest portion. Wafers are placed perpendicular to the gas flow with a preferred spacing approximately 50 mils on center when using wafers 20 mils thick. The wafers are placed in the tube from the source input end. At the gas exhaust end, intermediate the tube and the vacuum pump, is an optical baffle. The function of the optical baffle is to collect the undeposited silane material and silicon by-products which pass through the tube. The undeposited silane material appears in the form of a brown dust which is granular silicon and silicon monoxide. This granular material forms around the exit end of the tube and in the baffle.

Gaseous plasma reaction apparatus

Abstract: A low-temperature, gaseous, plasma reaction apparatus is described in which the reaction vessel is formed by two coaxially nested cylindrical chambers. A gas is introduced into the vessel and ionized by an R.F. electromagnetic field inductively coupled to the gas within the vessel by an exciter coil around the outer chamber. The inner chamber defines a central reaction region and is designed to optimize both the flow and distribution of gaseous ions around a non-gaseous specimen disposed in that region for efficient and uniform reaction therewith. The inner vessel is adapted to be removed from the outer vessel to thereby allow modular processing of non-gaseous specimens. The coaxial configuration of the dual chamber reaction vessel reduces contamination in the reaction region, provides means for conveniently and precisely positioning non-gaseous samples in the reaction region, and circumvents devitrification problems.

MOS power-on reset circuit

Abstract: An automatic power-on reset circuit adapted for use on complementary MOS integrated circuit semiconductor dies is provided. The circuit includes a voltage reference stage followed by an amplifier stage. A PN diode is coupled in series with a diode-connected MOSFET and a low current MOSFET device to provide a slight overdrive to the P-channel MOSFET of a CMOS inverter, which determines the initial output level thereof. As the voltage applied to the power supply conductor increases, the switching point of the amplifier-inverter stage varies until the output thereof assumes the opposite logic level. This transition of the output of the amplifier inverter stage is applied to wave shaping circuitry and an output circuit which reliably produces the desired reset signal.

Method for forming a deposited silicon dioxide layer on a semiconductor wafer

Abstract: The present invention is directed to a method for forming a thin silicon dioxide deposited layer on a semiconductor structure. The silicon dioxide layer is formed in a hot wall furnace typically used for diffusions. A convenient temperature is selected from those which are suitable for decomposing the TEOS source of the silicon dioxide into its constituent parts out of which the silicon dioxide layer is formed. A vacuum is used to pull the TEOS gas through the diffusion tube. Care is exercised to assure that the flow of the TEOS material through the diffusion tube is kept at a constant rate. Prior to the first use of a new TEOS source bottle, the bottle is placed in a vacuum at least low enough to complete the boiling of impurities from the source material. This predeposition vacuum step is calculated to remove all the impurities contained in the source bottle and caused by the in situ decomposition of the source material during transit and storage. Whenever the source material is allowed to stand for any period of time; i.e., overnight or any number of hours, the predeposition vacuum step removes those impurities formed during the in situ decomposition of the source material since its last use. Wafers to be coated with a deposited oxide layer are placed in a furnace boat perpendicular to the flow of the source gas. In the preferred embodiment, the wafers are spaced 200 mils apart. While there is no indentified maximum distance between wafers at which the present invention ceases to operate successfully, undesirable results occur by placing adjacent wafers closer than 100 mils while acceptable results are achieved by placing the wafers 100-200 mils apart.

Polycrystalline silicon pressure sensor

Abstract: 1. A POLYCRYSTALLINE SILICON PRESSURE SENSOR COMPRISING: A. A SUBSTRATE SUPPORT MEMBER HAVING A FLAT UPPER SURFACE, A FLEXIBLE INNER SECTION, AND A RIGID PERIPHERAL SECTION, RELATIVELY THICK COMPARED WITH THE FLEXIBLE SECTION, DOWNWARDLY DISPOSED TO FORM A SUPPORT FOR THE FLEXIBLE SECTION, THE MEMBER BEING OF A MATERIAL ON WHICH POLYCRYSTALLINE SILICON IS CAPABLE OF BEING DEPOSITED; B. A FIRST LAYER OF POLYCRYSTALLINE SILICON FORMED OVER THE FLAT UPPER SURFACE, SUFFICIENTLY THIN TO ENABLE FLEXING WITH THE FLEXIBLE INNER SECTION OF THE MEMBER; AND C. AT LEAST ONE PIEZORESISTIVE PRESSURE SENSITIVE ELEMENT OF A FIRST CONDUCTIVITY TYPE, FORMED THROUGH THE TOP SURFACE OF THE FIRST LAYER OVER THE FLEXIBLE INNER SECTION AND ESTENDING TO THE PERIPHERAL SECTION.

Digital sequence detector using multiple samples during each digit time period

Abstract: An asynchronous detector for detecting a binary word within a train of signals, wherein the train of signals and the binary word each contain bits, and each bit has a predetermined period. The detector includes a clock which develops a number of clock pulses within the time inverval of a bit period. The train of signals is coupled to the input of a shift register which is responsive to each clock pulse to shift the contents of each stage in the shift register, and enter a binary signal, corresponding to the signal in the train of signals coupled to the input, into the first stage. A memory circuit stores a binary word corresponding to the binary word to be recognized. A comparison circuit compares the binary signals in the shift register and the binary word in the memory circuit between clock pulses. If a predetermined number of correlations occur between the memory circuit contents and the shift register contents, the comparison circuit will develop a detection signal.

Silicon pressure sensor

Abstract: A method of fabricating a piezoresistive pressure sensor from a monocrystalline silicon wafer depends upon a boron P+ conductivity layer as an etch stop to an anisotropic etch using potassium hydroxide as the etchant. The etching is selectively done so that the inner portion of the wafer is relatively thin and the outer portion is relatively thick. The process permits the fabrication of piezoresistive pressure sensitive elements of a bridge to be formed of monocrystalline silicon in the relatively thin inner portion and also permits the fabrication of pressure insensitive elements, formed of monocrystalline silicon in the outer portion, electrically connected to the pressure sensitive elements. The resultant structure is a monocrystalline silicon wafer cut along the (110) or the (100) crystallographic plane and having at least the pressure sensitive and pressure insensitive elements of the bridge circuit as integral parts.

Flexible flat cable system

Abstract: A housing having an elongated slot therein with opposed parallel channels in the upper and lower surfaces adjacent the opening of the slot and parallel spaced apart ridges extending transverse to the longitudinal axis of the channels in the bottom surface of each of the channels. An elongated cylindrical, silicone rubber member having a diameter slightly larger than the width and depth of the channels positioned in each of the channels so as to extend slightly into the slot and a flexible flat cable having a fold therein transverse to the parallel conductors and positioned in the slot between the resilient members with each conductor parallel to and overlying a ridge in the adjacent channel. Said cable further defining openings between the conductors positioned in overlying relationship to the resilient members and a portion of the cable folded back over the housing and fixed in position by a strip of plastic having openings therethrough to provide test point access to the conductors.

Liquid crystal light control device having a high transmission efficiency

Abstract: A high image transmission efficiency for a precisely controllable time duration is provided by two twisted nematic, liquid crystal cells sandwiched between two polarizers. The polarizers are cross polarized. If neither liquid crystal cell is activated, the plane of polarization of light passed by the first polarizer is rotated by the first and second cells so that the light is absorbed by the second polarizer. If only the first cell is activated, the light and image are passed through the device. If both cells are activated, the light passed by the first polarizer is absorbed by the second polarizer. Circuitry for operating the liquid crystal device and a camera including a mechanical shutter which operates in cooperation with the device are also disclosed.

Liquid crystal light control device and circuit

Abstract: Light and image transmission for a precisely controllable time duration is provided by two twisted nematic, liquid crystal cells sandwiched between three polarizers. The first and second polarizers are polarized in a first direction and the third polarizer is polarized in a second direction. If the first cell is not activated, the plane of polarization of light passed by the first polarizer is rotated by the first cell so that the light is absorbed by the second polarizer. If only the first cell is activated, the light and image are passed through the device. If the second cell is activated, the plane of polarization of the light passing through the second cell is no longer rotated so that the light is absorbed by the third polarizer. Circuitry for operating and a camera including the device are also disclosed.

Electronic digital adder having a high speed carry propagation line

Abstract: A parallel, binary adder has extremely high speed carry propagation capabilities. The sum and the carry generated in each stage are developed simultaneously and share much of the same circuitry. In a preferred embodiment utilizing metal oxide semiconductor field-effect transistors, a carry propagation line is charged prior to the addition and carry generation and then is simply discharged or not discharged, depending on the outcome of the computation. In four of the eight possible combinations of inputs to generate a carry-out signal, a carry-in gate is activated, providing a path with no other logic gates and permitting a high speed ripple of the carry signal.

Machine and method for cutting brittle materials using a reciprocating cutting wire

Abstract: A web of wires defining a cutting area having a plurality of axially spaced apart wire portions formed by winding a continuous strand of wire around a plurality of elongated spaced apart pulleys, said continuous strand extending from a source of new wire and extending to take-up means. One of said elongated pulleys having a reversible motor attached thereto for causing the wire in the cutting area to continually move and periodically reverse directions. Mounting apparatus external of said web for fixedly holding a piece of material to be cut and moving the material into the cutting area in engagement with the wires therein at a generally uniform rate. Apparatus for supplying a continuous flow of cutting mixture, including relatively fine particles of cutting material and a relatively viscous carrying agent, to the cutting area and further apparatus for removing the cutting mixture from the wire as it leaves the cutting area, including a jet of gas directed onto the wire transverse to the longitudinal axis thereof, a bath for immersing the wire in a relatively low viscous fluid and a second jet of air directed onto the wire for removing the relatively low viscous mixture.

Asynchronous internally clocked sequential digital word detector

Abstract: A detector for detecting predetermined digital words within a train of signals wherein the digits in the words each have a predetermined time period. The detector continuously samples the train of signals coupled thereto. Samplings are taken a number of times during the interval of a digit time period, and a digital signal corresponding to the sampled signal for each sample taken is stored in a multi-stage storage register. Comparison circuitry compares the digital signals in the storage register with a first predetermined word in a memory circuit. If there is a correlation, the comparison circuit counts for a time period long enough to sample the train of signals and store a new series of signals corresponding to a second digital word. The comparison circuit compares these second digital signals with a second word in the memory circuit. A correlation between theset two words produces a detection signal.

Cmos odd multiple repetition rate divider circuit

Abstract: The disclosed divider circuit divides the repetition rate of an input signal by an odd integer to provide an output signal. The divider includes at least four binary cells and either a NOR and a NAND gate. Each binary cell includes first and second inversely clocked transmission gates and first and second inverters. Selected output terminals of three of the binary cells are connected to the input terminals of the gate and the output terminal of the gate is connected to the input terminal of the fourth binary cell. The resulting circuit configuration lends itself to fabrication by CMOS processes and takes up only a small amount of chip area.

Visual indication apparatus with rotatable transparent discs

Abstract: A novel rotary indicator apparatus which is particularly suitable for timepieces but which is adaptable for any application where derived information is to be visually displayed. For time-pieces two or more graduated discs are utilized in co-centric relation to one another. At least one of such discs is caused to rotate with respect to the other by having the respective discs exhibit a progressively decreasing color intensity but in opposite directions, a unique visual effect or traveling zone is evidenced to the viewer''s eye as the discs rotate one on top of the other.

Method of making isolated complementary monolithic insulated gate field effect transistors

Abstract: Complementary insulated gate field effect transistors are formed in a thin semiconductor layer of a first conductivity type by first forming a dielectric layer on a surface of the semiconductor layer. A polycrystalline support is then formed on the dielectric layer. A lightly doped tub region of a second conductivity type is formed in the semiconductor layer extending to the dielectric layer. The lightly doped tub region is preferably formed by carrying out a conventional diffusion operation, then removing a portion of the thickness of the semiconductor layer which contains the highest dopant concentration. Regions serving as source and drain electrodes of a first and second field effect transistor are then formed in the lightly doped tub region and in the semiconductor layer. Gate electrodes are provided over an insulating layer on the surface of the semiconductor layer to complete fabrication of the complementary devices. The gate electrodes may be formed after the source and drain electrodes, or before them, in a self aligned embodiment.

Impact ionization current in MOS devices

Abstract: An impact ionization current flows in the substrate of an MOS device which is operated in the saturation region This current results from hole-electron pairs created by impact ionization in the drain depletion region This paper utilizes the transverse electric field across the depletion region and the probability of creating a hole-electron pair as a function of this field to calculate substrate current which is then compared with measured data

Crystal controlled overtone oscillator having a rejection circuit for preventing oscillation at undesired overtones

Abstract: A crystal controlled overtone oscillator having a feedback circuit comprising a series connected inductance-capacitance arm having the values of the inductance and capacitance chosen to provide a net inductive reactance at the desired overtone and a net capacitive reactance at lower overtones, and a shunt inductance-capacitance arm that is resonant at the desired overtone. A broadband neutralization network is employed to neutralize the static shunt capacitance of the crystal and to provide the shunt inductance-capacitance arm.

Self-powered tachometer circuit

Abstract: A self-powered tachometer circuit utilizing variable reluctance pickup means applies the induced signal to a bridge network for full wave rectification after the maximum amplitude of the voltage has been limited and the signal differentiated to obtain pulses of uniform amplitude and uniform duration The fully rectified signal is then applied to a meter for indicating repetition rate Another embodiment using variable reluctance pickup means applies the induced pulses to a voltage doubler circuit for fast voltage pickup and operates a transistor switching circuit to drive the meter A capacitor discharges through the transistor with input pulses of one polarity while the capacitor is charged through the meter with pulses of the opposite polarity

Integral reflecting cavity semiconductor pumped laser

Abstract: The laser rod which may be Nd:YAG is reflectively coated over all of its surfaces except the ends and a narrow strip extending along the surface of the rod and parallel to its axis. An array of light emitting diodes of either non-coherent (spontaneous) light emitting type or coherent (laser) light emitting type are disposed with the light emitting direction being through the narrow strip. A metallic heat sink completely surrounds the sides of the laser rod except for the elongated strip, and is in good thermal conducting relation with the rod. A metallic heat sink is in good heat conducting relation with the light emitting diodes and is separated by an insulating spacer from the laser rod heat sink. The light emitting diodes are in a chamber defined by the laser rod, the heat sinks, and the insulating spacer. The chamber may or may not be filled with a clear optical cement.

Amplifier protection circuit

Abstract: A protection circuit for a transmitter amplifier is provided which senses the forward power level and develops a first voltage which is compared with a reference voltage to provide a control voltage which controls the power developed by the transmitter amplifier. An increase in the forward power level is detected changing the control voltage to cause a reduction in the forward power developed by the transmitter amplifier. A decrease in forward power level is detected changing the control voltage to cause an increase in forward power developed by the transmitter amplifier. A forward power level below a predetermined level for a predetermined period of time is detected causing a reduction in the reference voltage. Reduction of the reference voltage reduces the control voltage to reduce or terminate the forward power of the transmitter amplifier. An excessive control voltage coupled to the transmitter amplifier is also detected increasing the first voltage which in turn causes a reduction in the control voltage thereby maintaining the control voltage below a preset level.

Compensated electronic voltage source

Abstract: A voltage and temperature stable integrated voltage regulator circuit offsets the negative temperature coefficient of the baseto-emitter voltage of one transistor with a positive temperature coefficient derived from the base-to-emitter voltage differential Delta VBE between a pair of additional transistors Other transistors are used to produce a pair of regulated stable output voltages, each having a predetermined voltage with respect to a different one of the two input voltage terminals across which the regulator circuit is connected Circuit components are provided to cause the two output voltages to be voltage and temperature stable or to have a predetermined controllable temperature coefficient

Multi-level error detection code

Abstract: An error detecting coding and decoding system employing an encoder having a plurality of shift register systems for generating independent sequences of check bits for multiple level checks. A decoder having similar shift registers is employed to regenerate the check bits from the transmitted information and to compare the locally generated check bits with the transmitted check bits generated by the encoder.

MOS-device modeling for computer implementation

Abstract: Generalized MOS-device and circuit modeling problems are discussed. Guidelines for comparing MOS-device models, for selecting phenomena to be modeled, for acquiring model parameters, and for implementing the model are established. A voltage variable capacitance subroutine within a four-terminal Q_B field-dependent model is recommended. The importance of accurate data acquisition and model and parameter maintenance is stressed and computer implementation configurations are discussed.