Showing papers by "Motorola published in 1975"

Transmission trunk multichannel dispatch system with priority queuing

Abstract: A communication system of the type wherein a central station assigns a limited number of information channels to a requesting one of a plurality of remote stations is disclosed. The requesting station sends its identification signal along with the request signal to the central station on a signal channel. The central station classifies the requesting station in either a priority or a non-priority queue. The priority queue corresponds to those stations which are continuing an on-going interchange, whereas the nonpriority queue contains those stations which wish to initiate an interchange. Stations are prioritized in the queues on a first-in/first-out basis. The central station constantly monitors the information channels and, as channels become available, assigns the channels first to stations in the priority queue, then to nonpriority queue stations. A channel becomes "available" when the central station detects a pause, such as a momentary release of a push to talk microphone switch, in transmission of that channel. By this transmission trunking method, the system makes optimum use of the limited number of available channels. Additional central station processing provides an acknowledgement signal, which indicates that the request was received and a channel will be assigned as soon as one becomes available. Also, the identification of a requesting station is compared with an associate memory. The memory provides the identifications of all stations to whom the requesting station would transmit. Once a channel is available, it is assigned to the requesting station and to its associated stations, whereby the associated stations are notified of, and prepared for, the impending transmission.

Synchronous serial data adaptor

Abstract: An integrated circuit synchronous data adaptor (SSDA) provides a bidirectional interface for synchronous data interchange. Internal control and interface logic including first-in-first-out (FIFO) buffer memory enables simultaneous transmitting and receiving of standard synchronous communication characters to allow data transfer between serial data channels and the parallel bidirectional data bus of a bus organized system such as a microprocessor (MPU) system. Parallel data from the bus system is serially transmitted and received by the SSDA with synchronization character insertion and deletion, fill character insertion and deletion, parity generation and error checking. The functional configuration of the SSDA is programmed via the MPU system data bus during system initialization and can be reconfigured via program control during subsequent system operation. Programmable control registers provide control for variable word lengths, transmit control, receive control, synchronization control, and interrupt control. Status, timing and control lines provide peripheral unit or modem control.

Design Equations for an Interdigitated Directional Coupler (Short Papers)

Abstract: General design equations for an interdigitated directional coupler are derived. The design equations are written in terms of even- and odd-mode admittances for a pair of coupled lines which are identical to any pair of adjacent lines in the coupler. The calculated values of even- and odd-mode admittances can be translated into a physical configuration from published data on coupled lines.

Texture etching of silicon: method

Abstract: A surface etchant for silicon comprising an anisotropic etchant containing silicon is disclosed. The etchant provides a textured surface of randomly spaced and sized pyramids on a silicon surface. It is particularly useful in reducing the reflectivity of solar cell surfaces.

Universal battery charging apparatus

Abstract: Battery charging apparatus for charging batteries having different optimum charging rates, and wherein there is included in the same housing with the battery an electrical element having a characteristic related to a predetermined charging rate of the battery. Terminals are provided on the housing for the battery and the electrical element, for connection to the charging apparatus, and the charging apparatus utilizes the value of the characteristic of the element to control the supply of charging current to the battery. The electrical element provided with the battery may be a resistor, and the charging apparatus connects the resistor in a circuit to develop a control potential which is utilized to control the charging current. This control potential operates through a regulator to control the current through a resistance which is connected to the base of a transistor which controls the charging current. The current through the resistance controls the potential developed thereacross to provide a control potential at the base of the transistor to thereby control the charging current. An improved timer including four IC comparators may be utilized to control the length of time charging current is applied to the battery. Also, if the battery includes a heat sensitive element, such as a thermistor, circuitry is provided for sensing the presence and value of the thermistor and supplying a suitable rapid charge current to the battery. A pair of light emitting diodes are connected to the charging circuit to indicate when charging current is supplied to the battery.

Receiver system for receiving audio electrical signals

Abstract: A receiver system includes means for electromagnetically coupling audio bandwidth information signals from an induction loop to a miniature induction receiver/transducer. The induction loop is shaped to be worn around the neck of a wearer. The receiver/transducer is physically shaped for placement in the mouth of the wearer. In response to the varying magnetic induction field generated by the induction loop, the audio bandwidth information signals are amplified by the receiver and converted into substantially linear mechanical movement by the transducer. The output of the transducer is propagated mechanically, directly to the inner ear mechanism, via the teeth and gums of the wearer whereby the wearer perceives the message content of the audio bandwidth information signals without the use of conventional outer ear mechanism.

Asynchronous communication interface adaptor

Abstract: An integrated circuit asynchronous communications interface adapter (ACIA) includes circuitry on a semiconductor chip for interfacing with a bidirectional data bus of a microcomputer. Bus interface circuitry on the ACIA chip controls data transfer between the microcomputer data bus and a transmit data register and a read data register on the ACIA chip. Transmitting circuitry on the ACIA chip converts data from a parallel format to a serial format. Receiving circuitry on the ACIA chip accepts data in a serial format and converts it to a parallel format prior to transferring it to a receive data register. A control register controls data transfer throughout the ACIA chip. A status register on the ACIA chip may be interrogated under program control to determine the status of registers and/or correctness of data format, status of interrupt logic or modem control lines. Several Modem and/or peripheral control functions, including a "clear-to-send" input, a "request-to-send" output and a "data-carrier-loss detected" input are provided by circuitry on the ACIA chip.

Mounting assemblies for a plurality of transistor integrated circuit chips

Abstract: A mounting assembly for a power transistor integrated circuit chip having a pair of electrodes on one surface thereof comprising base and emitter connections and a third electrode on the opposite surface thereof comprising the collector connection, is fabricated by the method including the steps of providing an electrically conductive strip having a central cavity extending the length thereof, the depth of the cavity being substantially equal to the height of the chip and the strip also including arms extending outwardly at opposite sides of the cavity; tinning the strip with solder; placing transistor chips in the cavity adjacent each other with the collector electrodes thereof being in contacting engagement with the strip; heating the strip with the chips therein to reflow the solder for connecting the chips thereto at the collector electrode; and severing the strip transverse the length thereof between chips to provide individual power transistor chip mounting assemblies each having a pair of outwardly extending support feet formed from the severed arms of the strip. The mounting assembly can be mounted to printed circuit conductors which are in-line by soldering the support feet to predetermined ones of the conductors and the base and emitter electrodes to others of the conductors.

Improved receiver selecting (voting) system

Abstract: An improved receiver voting system is disclosed in which the lowest noise audio signal produced by a number of different radio receivers is selected and coupled to a monitoring speaker. Each receiver receives signals from a transmitter and produces either corresponding audio signals or squelch indicating status tones which are then transmitted to a voting (selecting) control center by telephone communication lines. The voting control center then selects the unsquelched receiver audio signal having the lowest noise level and couples this signal to a monitoring speaker. The voting center indicates which receiver is supplying the selected signal and therefore identifies the most favorable receiver to transmitter signal path. Parallel squelch circuits in each receiver provide for the initial selection of the strongest received signal while preventing the existence of an irratating "squelch tail." Automatic gain control circuitry in the voting control center compensates for loss variations between the different transmission lines coupling signals to the voting control center. Status tone decoders in the voting control center prevent the selection of the squelch indicating status tone as the receiver signal having the lowest noise level. The voting control center has circuitry for switching in a status tone notch filter and changing the response time of the status tone decoder whenever a squelch indicating status tone is anticipated by the control center. Each receiver produces an audio pause which precedes the production of a squelch indicating status tone, and this enables the voting control center to anticipate the status tone and to rapidly respond to its occurrence.

Universal automotive electronic radio

Abstract: Selected radio circuits are fabricated on modules which plug into a "mother" board located in the radio chassis. The circuitry includes a plurality of RF front ends (including at least one AM and one FM front end), each tunable over a selected radio band by tuner circuitry. The AM front end includes a saturable core reactor whose tuning inductance varies as a function of the tuning current provided to it by a voltage-to-current converter in the tuner. Both AM and FM signals are translated by a frequency synthesizer to a common IF frequency, namely 10.7 MHz. The synthesizer employs a quartz crystal controlled oscillator feeding a phase lock loop whose frequency is varied via the tuning control. Quartz crystal filters for AM, and ceramic filters for FM provide required selectivity. As all signals are at the same IF, a common IF amplifier is employed. Further, a single phase lock loop is adapted to demodulate both AM and FM signals. The resultant demodulated signals are amplified, and tone shaped, via D. C. voltage controlled audio processor circuitry. The audio circuitry is adapted to accept auxiliary inputs, such as the output of a tape player. A digital display senses tuner status providing frequency read out. Additional provisions allow switching the display to read out tape player status, or to provide a time display from an electronic clock.

Transistor protection circuit

Abstract: The disclosed protection circuit which is suitable for providing protection of transistors included in integrated circuits such as regulators and power amplifiers, includes thermal shutdown, safe area and current control circuits. The current control portion includes a sense transistor connected substantially in parallel with the transistor to be protected. In monolithic integrated circuit applications, the sense transistor has an emitter area that is a predetermined ratio of the emitter area of the protected transistor. A "sense resistor" is connected to the sense transistor and develops a control signal which is proportional to the instantaneous current being conducted by the protected transistor. A threshold circuit is coupled between the sense resistor and the drive circuit for the protected transistor and responds to the magnitude of the control signal crossing a predetermined threshold to remove or reduce the drive to the protected transistor.

Solid-state ignition system and method for linearly regulating and dwell time thereof

Abstract: An electronic, solid-state ignition system for an internal combustion engine is disclosed which is responsive to alternating timing signals produced in timed relationship with the engine. The electronic system comprises a plurality of integrator circuits, as transistorized output stage and a feedback loop for linearly regulating the current limit duty cycle to a fixed percentage of the firing cycle time period independent of current ramp time through the coil. A further circuit also responsive to the timing signals is included, which circuit overrides the aforementioned electronic system below a predetermined engine rpm. The overriding circuit effects a desired lead angle to the timing signals applied thereto to produce a minimum dwell angle for engine speeds below the predetermined engine rpm. As a result, sufficient spark potential is developed and predetermined spark timing is produced, with minimum power consumption in the ignition system, thereby preventing misspark even though the engine may be accelerating at a maximum specified rate or decelerating.

Digital detection system for differential phase shift keyed signals

Abstract: A digital detection system for binary differential phase shift keyed (DPSK) signals includes first and second multipliers to which the signal is applied, and which receive reference signals applied in quadrature to the two multipliers. The outputs of the multipliers are each applied through a filter to a one bit delay circuit, with the outputs of the filters and delay circuits being applied to third and fourth multipliers. The outputs of the third and fourth multipliers which receive signals from the two filters are summed to provide the detected digital signal. The filters may be matched filters each including an integrate, sample and dump circuit, and a data transition tracking loop coupled to the first multiplier and to the detector system output provides a bit synchronization signal for the matched filters. An I-Q loop may be coupled to the outputs of the two matched filters and controls an oscillator which provides the reference signals for the first and second multipliers. The addition of two multipliers and three summing circuits can extend the detection system for use with quaternary (four-phase) differential phase shift keyed signals.

Radio frequency connector system for portable radios

Abstract: The connector system includes a radio mounted receptacle with an integral transfer switch, and a separate connector and cable for interface with external radio frequency (R.F.) circuits, and provides a method of connecting external R.F. circuits to a portable radio and for simultaneously and automatically transferring the internal radio circuits from an integral radio antenna to the receptacle. The integral transfer switch of the receptacle connector includes a movable conductive plunger retained within a conducting sleeve and adapted to slide in an insulator between a first position at which the head of the plunger engages an inturned end of the sleeve, and a second position in which the plunger engages a flexible contact connected to the radio circuit and moves it away from a contact connected to the selfcontained antenna. A connector connected to a coaxial line, which may be connected to external radio frequency signal source, has an outer conductor adapted to connect to the sleeve and an inner conductor which enters the sleeve and engages the plunger to make electrical connection therewith and move the same to the second position. This disconnects the self-contained antenna from the radio circuit and connects the coaxial line thereto. The sleeve, plunger, and inner and outer conductors provide a matched impedance connection from the external source to the radio circuit. The external connector can be manually connected to the radio mounted receptacle connector or automatically coupled thereto when the portable radio is positioned in a carrying housing.

Digital programmable tone detector

Abstract: An improved detection arrangement for detecting the presence of a given tone in a received input signal. A reference generator, in the form of a reference clock and a programmable divider, produces a first reference frequency, equal to the frequency of the tone, and at an arbitrary phase angle thereto. A second generator output is in quadrature to the first. Each reference signal is product detected with the input signal via exclusive OR gates. A unique digital low pass filter, operating in a time multiplex mode, receives the gate outputs, removes all high frequency components therefrom, and produces pairs of output binary number encoded signals, each of which is representative of a vector component of a detected tone. Threshold detector circuitry monitors the outputs indicating an above threshold condition at its output in response to predetermined combinations of the binary numbers. The combinations represent all input vectors whose resultant absolute magnitude exceeds a chosen threshold. A second detector samples the threshold detector output, recording the number of samples over threshold during a given interval. If the number exceeds a selected minimum an output signal is produced which indicates the presence of a received tone.

Evidence for a Smectic-A-Nematic Tricritical Point: Binary Mixtures

Abstract: Differential scanning calorimetry measurements of the smectic-$A$---nematic latent heat of transition in binary mixtures of ${\mathrm{C}}_{8}$${\mathrm{H}}_{17}$O-${\mathrm{C}}_{6}$${\mathrm{H}}_{4}$-CHN-${\mathrm{C}}_{6}$${\mathrm{H}}_{4}$-${\mathrm{C}}_{3}$ ${\mathrm{H}}_{7}$ (8O.3) and ${\mathrm{C}}_{2}$${\mathrm{H}}_{5}$O-${\mathrm{C}}_{6}$${\mathrm{H}}_{4}$-CHN-${\mathrm{C}}_{6}$ ${\mathrm{H}}_{4}$-${\mathrm{C}}_{3}$${\mathrm{H}}_{7}$ (2O.3) strongly suggest the existence of a tricritical point at approximately 70 mole% 8O.3.

Package and method for a semiconductor radiant energy emitting device

Abstract: Method and structure for encapsulating or providing a package for a light emitting semiconductor device in order to prevent package failure due to chemical contaminants. A light emitting semiconductor chip is connected to terminal leads having sharp angular portions. The device and the sharp angular portions are coated with a resilient elastomeric resin material inner core. An outer core comprising an acrylic or polycarbonate plastic material is injection molded over the inner core so as to leave exposed terminal leads for interconnection to electrical substrates such as cards or printed circuit boards.

Semiconductor solar energy device

Abstract: This disclosure relates to a semiconductor solar energy device which is of the PN-type and utilizes a dielectric anti-reflective coating on the side of the device that faces the sunlight. The fabrication techniques used in making this semiconductor device include the use of ion implantation to form doped or diffused regions in the device. One of the ion implanted regions located on the side of the device that is subjected to the sunlight is configured in order to permit metal ohmic contact to be made thereto without shorting through the doped region during sintering of the metal contacts to the semiconductor substrate. The dielectric anti-reflective coating, in one embodiment, is a composite of silicon dioxide and silicon nitride layers. The device is designed to permit solder contacts to be made to the P and N regions thereof without possibility of shorting to semiconductor regions of opposite type conductivity.

Pay TV control system

Abstract: A simple recyclable key and locking system for enabling a pay TV converter is disclosed. The key is a small tag such as might be attached to the room key of a hotel room and is to be turned in with the room key. The TV viewing key is inserted into a locking-unlocking unit which determines its validity, makes the appropriate connection in a pay TV converter to enable viewing, then cancels the validity of the key. When turned in, the key is easily examined as to whether or not it has been used, and, if so, it can be quickly revalidated for reuse. The key user is billed only if his viewing key has been used, or is not returned. In a residential situation, the viewing key would be purchased, then discarded after one use.

Vehicle repeater prioritization system

Abstract: An improved repeater adds on to each mobile transceiver of a radio wave communication system for selectively controlling rebroadcasts to an associated portable station. Novel circuitry within each associated repeater eliminates rebroadcast interference among local units, while keeping retransmission delay at an optimized minimum. At turn on, detector circuitry senses if a nearby repeater is broadcasting. In response thereto, programmable delay circuitry is activated to a high incremental state. Where no repeater broadcast is sensed, a program signal is transmitted which increments all nearby repeaters to their next higher delay state. On reception of a signal to be rebroadcast, the repeater whose delay circuitry is in the lowest incremental state initiates rebroadcast, thereby inhibiting the remaining units. A special feature of the programmable delay circuitry is that each repeater is automatically assigned a unique incremental delay time whereby repeater prioritization is positively established. Rebroadcast delay time is kept to a minimum as the system assures that one repeater is at the lowest delay priority. BACKGROUND OF THE INVENTION The present invention relates generally to radio wave communication systems of the type employing a base station, a plurality of portable stations and a plurality of mobile repeating stations, and more particularly to improved means for, and a method of, assigning a rebroadcast priority to the repeaters in such systems in a mamnner to minimize undesireable interference. Mobile ratio wave communication systems normally comprise a base station and a plurality of mobile stations, each of which is typically located with an automotive vehicle. In many applications, such as police work, it is important for the user to maintain communication with the base station or other mobile transceivers upon leaving his mobile vehicle. To resolve this problem various repeater add-on systems have been proposed. Generally, such systems interconnect with the mobile transceiver whereby the audio signal from the transceiver is reprocessed through a second transmitter and broadcast on a second frequency to a portable transceiver. Likewise, signals from the portable transceiver are received in a second receiver and applied to the mobile transceiver where they are broadcast back out on the mobile-base station frequency. A problem with such repeater systems occurs when a plurality of mobile transceivers are in the same locale. In this situation each repeater will attempt to rebroadcast base station, mobile, or portable transmissions. Simultaneous broadcasts by nearby repeaters results in interference creating loss of intelligibility of the transmitted signals. One solution to the interference problem is to operate the various repeaters and their respective portable transceivers on different frequencies. However, this anticipates a complicated and cumbersome system. A second solution, known in the art, contemplates a random sampling technique. Accordingly, a random sampling generator is to be included in each repeater in the communications system. Once a signal to be retransmitted is received the first repeater whose random sampling generator creates an enable pulse following the received signal transmits a lockout to any other repeaters and proceeds to repeat the incoming information. This system has several undesirable drawbacks. First there is a considerable delay time introduced by the sampling function. This delay is in addition to the normal attack times of a transmiter or receiver. The increased delay time might be as long as the disable period of a random sampling generator. Further, there remains a significant probability of interference among transceiver units using the random sampling method. Finally, if the sampling generators are identical and enable pulses occur at similar times in two or more units there is the possibility that the pulses may tend to remain in synchronism and interference would occur on each transmission. The only means to break the interference would be waiting until the enable pulses drift out of synchronization or to shut off one of the offending repeaters. OBJECTS OF THE INVENTION It is an object of the present invention, therefore, to provide a repeating system which eliminates interference between nearby repeator units. It is a further object of the present invention to provide a repeating system as described above which initiates rebroadcasts with a minimum delay time. A further object of the present invention is to provide a repeating system as described above which is fully automatic in operation. Briefly, according to the invention, a radio wave communication system comprises a base station and mobile stations broadcasting signals at a first frequency, a portable station receiving signals broadcast at a second frequency, and a plurality of repeaters receiving signals broadcast at a first frequency and rebroadcasting said signals at the second frequency. Each repeater comprises delay circuitry delaying rebroadcasts for a programmed time period; a detector sensing for signals broadcast at the second frequency during the delay period and including means inhibiting repeater rebroadcast in response to a received detect signal; and means for programming the time delay. The programmed delay circuitry includes a clock, a counter, and comparator means instituting rebroadcast at a predetermined count. The counter outputs a high count in its first mode and an initial count in its second mode. Further, the counter is adapted to increment its count output in a first polarity responsive to received program signals, and in a second polarity in response to input clock pulses. On reception of a signal to be rebroadcast, the clock initiates and begins counting down the counter. The first repeater to be incremented to its lowest state is the first to satisfy the comparator whereby retransmission occurs locking out the remaining repeaters. Repeater programming occurs when a portable unit is removed from the repeater mobile transceiver. At this time the repeater senses whether or not a transmission is occurring on the second frequency, acting to transmit a program signal incrementing all nearby repeaters to the next higher counter state in the absence of a second signal, and otherwise incrementing its own counter to a higher state if a detected signal is present. Thus, generally, the last repeater to enter an area will be the one in the lowest incremental state, hence the one to repeat all transmissions. Should the repeater in the lowest counter state leave the area, a remaining repeater in the second highest priority will rebroadcast after its time delay, and reset its own counter to the lowest state whereby minimum time delay is established for subsequent transmissions.

Implementation of surface sensitive semiconductor devices

Abstract: A semiconductor structure is disclosed which reliably provides for very high PN junction reverse breakdown voltages. A very high resistivity film overlying a junction-protecting oxide passivation layer and making electrical contact with the P-type material and the N material of the subject PN junction is utilized to neutralize the effects of accumulated charge on or within the oxide passivation layer. Annular guard rings surrounding and spaced from the subject PN junction may be biased by contacting the high resistivity film, thereby improving the PN junction reverse breakdown voltage. The stability of the shunt leakage current through the high resistivity film is greatly increased by means of a thin, high integrity oxide layer grown or deposited thereon. In integrated circuit structures, parasitic FET paths due to inversion of semiconductor material caused by charge accumulations at the oxide surface are suppressed by judicious electroding, wherein the oxide surface potential over critical regions is set to desired values by judicious extensions of interconnnect metalization and very high resistivity films over the oxide surface, and in intimate contact therewith. The use of the very high resistivity film allows setting of oxide surface potentials over critical areas otherwise unaccessible because of metal interconnect layout limitations.

PA protection circuit for a single sideband radio

Abstract: A directional power detector mounted between the power amplifier and antenna which supplies audio frequency output signals indicative of forward and reflected power, circuitry for summing and converting the output signals from the power detector means to a DC potential proportional to the magnitude thereof and a transistor connected in shunt at the input of the power amplifier and controlled by the DC potential for controlling the peak envelope power at the antenna.

Crystal oscillator temperature compensating circuit

Abstract: A circuit for generating a temperature varying control voltage which is applied to a varactor diode to temperature compensate a crystal oscillator is disclosed. The circuit produces a substantially linear voltage versus temperature variation, including a point of inflection, in a middle temperature range, and a substantially non-linear voltage versus temperature variation in hot and cold temperature ranges. The control voltage versus temperature characteristic also undergoes a change in slope polarity in both the hot and cold temperature ranges. The temperature compensating circuit has a middle range circuit for independently creating the substantially linear variation in the middle temperature range, a cold range circuit operative below a predetermined temperature for creating the desired variation in the cold temperature range, and a hot temperature circuit operative above a predetermined temperature for creating the desired temperature variation in the hot temperature range. Each temperature range circuit includes a thermistor and a transistor which together control the operative range and the magnitude of the temperature variation contributed by each of the circuits.

Alternator having single stator with dual windings and compound output

Abstract: A dual wound stator for a multiphase alternator operating at varying speeds and supplying rectified current at constant voltage with variable output. By combining windings having many turns of smaller wire with windings having fewer turns of larger wire, a compound curve of output is obtained, combing low cut-in speed with high maximum output and increased efficiency.

Pulse coherent transponder with precision frequency offset

Abstract: A radar reply transponder for use with existing radar tracking systems wherein a reply pulse is generated and trasmitted in response to an associated interrogation pulse. The reply pulse is delayed in time and offset in frequency by a precise amount with respect to the interrogation pulse, but it is nevertheless phase coherent therewith so as to preserve the required Doppler frequency information and thereby permit accurate velocity measurements. Phase coherence is effectively maintained by utilizing a single continuously operating local oscillator for down-converting the received interrogation pulse to an intermediate frequency as well as up-converting the signal information to provide the delayed and frequency offset reply pulse. The precision frequency offset is obtained by switching in an additional reactance element in the oscillator-determining circuitry during the time up-converting is being effected. The radar transponder may thus be used in a high-vibration environment with no substantial introduction of error in velocity measurements caused by using two independent oscillators to formulate the frequency offset.

Carrying device for portable article

Abstract: A carrying device for an elongated portable article has a back plate with an integral portion forming a loop for receiving the article, with a stop surface adapted to be engaged by a ledge on the article. The device includes a latch secured to the back plate having a projection cooperating with a part of the article to hold the article in the device. The device can be adapted to carry a portable radio having controls on the top and side and a grille at the front, with the ledge being below the side control. The controls and the speaker grille are not obstructed when the radio is being carried. The device can be used to carry radios which vary in length and in other respects, which are of a size to be positioned within the loop and which have a ledge and a part at a fixed position with respect to the ledge to cooperate with the latch. A belt loop or other mounting element can be attached to the device for supporting the same.

High energy adaptive ignition via digital control

Abstract: A digital system controls ignition dwell for an internal combustion engine. Dwell time is maintained constant, thus assuring a constant high level ignition spark, over the entire active RPM range of the engine. In addition, the system compensates for temperature and aging induced changes in the ignition components. In operation, one sensor generates pulses representative of engine angular position while a second produces ignition pulses. An angle counter stores the number of position pulses generated thereby creating a count representative of engine position. A speed counter stores the number of position pulses generated for a clock interval, producing a count representative of engine speed. Dwell time is initiated at a predetermined relationship between the counter outputs which assures a constant dwell time. Feedback circuitry monitors current through the ignition coil and alters the clock interval to compensate for ignition component changes.

Control center for a communications system with interchannel patching capabilities

Abstract: A radio communication system of base stations, and a telephone system, are linked and controlled by a control center. A housing having a plurality of control modules electrically and mechanically engaged therein, each control module having a front panel with a patch switch and a plurality of indicators thereon, the control modules each adapted to be connected to a transmitter/receiver base station for receiving all communications to and from the base station on an associated communications channel and controlling the operation of the base station, a plurality of buses mounted in the housing and a patch board on each of said modules for electrically connecting any of said modules to said buses upon operation of the patch switch on said module, a phone patch module mounted in the housing and adapted to be coupled to a pair of telephone lines and including a switch for patching any communications channel to the telephone lines upon operation of the switches in the control module for the communications channel and in the phone patch, an operator module mounted in the housing and including a monitor speaker, microphone, and push-to-talk switch and associated circuitry connecting the aforesaid to audio and push-to-talk buses in the housing, and a patch tone encoder module mounted in the housing and supplying a plurality of tones on a tone encoder bus, said tones being utilized by predetermined ones of said control modules to control the base station.

Modular console enclosure with writing surface

Abstract: A modular console system for housing display devices, panel-mounted apparatus, storage facilities, writing surfaces and the like comprises interchangeable parts which can be assembled or replaced on site. The writing surfaces are added or removed from the front and are cantilevered from a V-shaped structural member without occupying otherwise useful space.

Valid memory address enable system for a microprocessor system

Abstract: A digital system includes a microprocessor coupled to a data bus and an address bus. A memory for storing data and instructions is connected to the data bus and the address bus. A peripheral device is connected to an interface adaptor. The interface adaptor is connected to the data bus and the address bus, and performs the function of interfacing between the digital system and a peripheral device, such as a printer or a display device. The microprocessor includes logic circuitry for generating a Valid Memory Address (VMA) output. The VMA output is used to generate an enable signal applied to the memory and the adaptor to enable the memory and the adaptor to be accessed by the microprocessor when the binary address on the address bus is valid and to prevent the memory and the adaptor from being accessed by the microprocessor when the binary address on the address bus is not valid with respect to the microprocessor.