scispace - formally typeset
Search or ask a question

Showing papers by "Motorola published in 1994"


Journal Article•DOI•
TL;DR: The analogy between genetic algorithms and the search processes in nature is drawn and the genetic algorithm that Holland introduced in 1975 and the workings of GAs are described and surveyed.
Abstract: Genetic algorithms provide an alternative to traditional optimization techniques by using directed random searches to locate optimal solutions in complex landscapes. We introduce the art and science of genetic algorithms and survey current issues in GA theory and practice. We do not present a detailed study, instead, we offer a quick guide into the labyrinth of GA research. First, we draw the analogy between genetic algorithms and the search processes in nature. Then we describe the genetic algorithm that Holland introduced in 1975 and the workings of GAs. After a survey of techniques proposed as improvements to Holland's GA and of some radically different approaches, we survey the advances in GA theory related to modeling, dynamics, and deception. >

2,095 citations


Patent•
02 Sep 1994
TL;DR: In this paper, the authors describe medical diagnosis and monitoring equipment with wireless electrodes (2a...2f) designed to be secured to the skin of the patient, which can be used to detect EEG and ECG signals or to monitor body/berathing movements.
Abstract: The invention concerns medical diagnosis and monitoring equipment with wireless electrodes (2a...2f) designed to be secured to the skin of the patient (3). The electrodes (2a...2f) include, as well as microsensors, a digital transmitter (31) and receiver (30) unit and an antenna (36a). The electrodes (2a...2f) can be used, for instance, to detect EEG and ECG signals or to monitor body/berathing movements, temperature or perspiration. A preferred embodiment has an electrode which incorporates all functions in a semiconductor chip designed as an integrated circuit with the appropriate sensor, sensor-control, frequency-generation, transmitter and receiver units plus a switching control unit. The antenna (36a) can be mounted either in the flexible electrode covering or directly on the chip.

1,135 citations


Journal Article•DOI•
TL;DR: In this paper, a block coding scheme for the reduction of the peak to mean envelope power ratio of multicarrier transmission schemes such as OFDM was proposed, and the specific example of a four-carrier signal was shown that the peak-to-means-envelope power ratio can be reduced from 6.02 dB to 2.48 dB with a 3/4 rate block code.
Abstract: A block coding scheme for the reduction of the peak to mean envelope power ratio of multicarrier transmission schemes such as OFDM is proposed. The principle of the scheme is illustrated with the specific example of a four-carrier signal. It is shown that the peak to mean envelope power ratio of this signal can be reduced from 6.02 dB to 2.48 dB with a 3/4 rate block code. The application of the block coding principle with flexibility such that the coding rate can be traded against peak to mean envelope power ratio is illustrated with the example of an eight-carrier signal.

804 citations


Journal Article•DOI•
31 Mar 1994-Nature
TL;DR: In this paper, the authors measured the water density profile perpendicular to a silver surface at two applied voltages and found that the water molecules are ordered in layers extending about three molecular diameters from the electrode, and that the spacing between the electrode and first water layer indicates an oxygen-up (oxygen-down) average orientation for negative (positive) charge.
Abstract: THE arrangement of water molecules at charged, aqueous interfaces is an important question in electrochemistry, geochemistry and biology. Theoretical studies1–11 suggest that the molecules become arranged in several layers adjacent to a solid interface, with densities similar to that in the bulk, and that the molecules in the first layer are reoriented from oxygen-up to oxygen-down as the electrode charge changes from negative to positive. Few of these predictions have been verified experimentally12–16, however. Using X-ray scattering, we have measured the water density profile perpendicular to a silver (111) surface at two applied voltages. We find that the water molecules are ordered in layers extending about three molecular diameters from the electrode, and that the spacing between the electrode and first water layer indicates an oxygen-up (oxygen-down) average orientation for negative (positive) charge. Contrary to current models, however, we find that the first layer has a far greater density than that in bulk water. This implies that the hydrogen-bonding network is disrupted in this layer, and that the properties of the water in the layer are likely to be very different from those in the bulk.

534 citations


Patent•
Leo M. Higgins1•
19 Apr 1994
TL;DR: In this paper, a conformal insulating coating (24) is applied over the device to provide electrical insulation of signal paths (e.g. leads 54 and conductive traces 18) from subsequently deposited conductive shielding layers.
Abstract: Electronic components are shielded from electromagnetic interference (EMI) by one or more conformal layers filled with selected filler particulars for attenuate specific EMI frequencies or a general range of frequencies. Shielding is accomplished through the use of a single general purpose shielding layer, or through a series of shielding layers for protecting more specific EMI frequencies. In a multilayer embodiment, a semiconductor device (50) is mounted on a printed circuit board substrate (16) as a portion of an electronic component assembly (10). A conformal insulating coating (24) is applied over the device to provide electrical insulation of signal paths (e.g. leads 54 and conductive traces 18) from subsequently deposited conductive shielding layers. One or more shielding layers (60, 62, and 64) are deposited, and are in electrical contact with a ground ring (56). In a preferred embodiment, the ground connections for the shield layers are separate from those used for power distribution within the devices.

341 citations


Patent•
Wright James A1, Ali Saidi1•
29 Mar 1994
TL;DR: In this article, an electronic greeting card communication system (100) includes a first personal communicator (102), an electronic mail server (136), and a second personal communicators (102).
Abstract: An electronic greeting card communication system (100) includes a first personal communicator (102), an electronic mail server (136), and a second personal communicator (102). The first personal communicator accepts off-line selection of an electronic greeting card from a user (502), and then transmits a request message corresponding to the off-line selection. The electronic mail server (136) receives the request message and then wireless transmits an electronic greeting card message to the second personal communicator (102) and updates billing information (620) for billing the user of the first personal communicator (102). The second personal communicator (102) selectively receives the wireless transmitted electronic greeting card message and presents it to a user.

313 citations


Patent•
Frank J. Juskey1, Anthony B. Suppelsa1•
24 Jan 1994
TL;DR: In this article, a thermally and electrically conductive plastic material (20) containing metal particles is transfer molded to encapsulate the semiconductor device, the underfill adhesive, and a portion of the first side of the leadless circuit carrying substrate, forming a cover.
Abstract: A semiconductor device package comprises a substrate (10), a flip-chip (16), an underfill adhesive (25), and a thermally and electrically conductive plastic material (20). A leadless circuit carrying substrate has a metallization pattern (13) on a first side (15), one portion of the metallization pattern being a circuit ground (17). The second side has an array of surface mount solder pads (24) electrically connected to the metallization pattern by means of at least one conductive via (26) through the substrate. A semiconductor device (16) is flip-chip mounted to the metallization pattern by means of metal bumps (22). An underfill adhesive (25) fills the gap between the semiconductor device and the substrate. A thermally and electrically conductive plastic material (20) containing metal particles is transfer molded to encapsulate the semiconductor device, the underfill adhesive, and a portion of the first side of the leadless circuit carrying substrate, forming a cover. The conductive plastic material is electrically connected to the circuit ground to shield the semiconductor device from radio frequency energy, and is mechanically attached to the semiconductor device to dissipate heat. Fins (28) may be molded into the conductive plastic material to further enhance the ability to dissipate heat.

302 citations


Journal Article•DOI•
J. Bryzek, K. Peterson, W. McCulley1•
TL;DR: In this article, the authors describe the fabrication techniques, surface activity, atomic bonds, LIGA and SLIGA, and bury and destroy of miniature electromechanical sensors and actuators.
Abstract: Miniature electromechanical sensors and actuators can be mass produced on silicon wafers much like ICs. They combine readily with signal-processing circuitry into powerful tools that measure, analyze, and control their environments. The authors describe the fabrication techniques, surface activity, atomic bonds, LIGA and SLIGA, and bury and destroy. The following applications are discussed: pressure sensors, medical equipment, industrial/consumer equipment, avionics, and mechanical applications. >

290 citations


Journal Article•DOI•
Jr. G.D. Forney1•
TL;DR: This semi-tutorial paper discusses the connections between the dimension/length profile (DLP) of a linear code, which is essentially the same as its "generalized Hamming weight hierarchy", and the complexity of its minimal trellis diagram.
Abstract: This semi-tutorial paper discusses the connections between the dimension/length profile (DLP) of a linear code, which is essentially the same as its "generalized Hamming weight hierarchy", and the complexity of its minimal trellis diagram. These connections are close and deep. DLP duality is closely related to trellis duality. The DLP of a code gives tight bounds on its state and branch complexity profiles under any coordinate ordering; these bounds can often be met. A maximum distance separable (MDS) code is characterized by a certain extremal DLP, from which the main properties of MDS codes are easily derived. The simplicity and generality of these interrelationships are emphasized. >

278 citations


Journal Article•DOI•
13 Oct 1994-Nature
TL;DR: In this paper, the crystal structure of an organic solid with large-diameter (about 9 A) extended channels is described, where the channels are formed from planar, rigid macrocyclic building blocks.
Abstract: RESEARCH on microporous solids has focused largely on inorganic materials such as aluminosilicates (zeolites), aluminophosphates, pillared clays and other layered materials1,2. An elusive goal has been the design of new materials with specific properties such as selective adsorption and catalytic activity. It would be very useful if the tools of molecular synthesis could be brought to bear on this problem. Here we report the design, based on a modular approach, and the crystal structure of an organic solid with large-diameter (about 9 A) extended channels. The channels are formed from planar, rigid macrocyclic building blocks. Onto the outer rim of the macrocycles are attached phenolic groups, which form hexagonally closest-packed two-dimensional hydrogen-bonded networks. Extended channels result from the stacking of these layers in a way that maintains registry between the macrocyclic cavities, and these channels are filled with solvent molecules. This approach potentially offers a simple means to exercise control over pore size and shape in the solid state.

272 citations


Patent•
31 Oct 1994
TL;DR: In this article, a portable device (55) has a first receiver (62) for receiving a paging signal (40-52) from a Paging system (10), and a second receiver (72) receives area identification signals (20-26) from another system.
Abstract: A portable device (55) has a first receiver (62) for receiving a paging signal (40-52) from a paging system (10). A second receiver (72) receives area identification signals (20-26) from a second system. The received paging signals may be stored in a memory (80) for later retrieval. A controller (75) examines the paging signals (40-52) and selects messages having a location signal (44, 50) matching a location of the device (55). The address of the device (66) may also be used to select the messages. Upon selection, an alert is generated by an alert means (82) and the message is annunciated on a display (84).

Patent•
18 Jul 1994
TL;DR: In this article, the first and second modes of operation controlled by a moveable flap are discussed, where the first mode of operation provides two way voice communication when the flap is in a closed position and the second mode provides a personal organizer when it is in an open position.
Abstract: A handset (100) has first and second modes of operation controlled by a moveable flap (104). The first mode of operation provides two way voice communication when the moveable flap (104) is in a closed position. The second mode of operation provides a personal organizer when the flap (104) is in a open position.

Patent•
16 Feb 1994
TL;DR: An RF tagging system which provides a large number of potential identification codes without increasing the physical size of RF tags used therein is described in this article, where the external reader includes a detector (216, 218, 220, 222) and a decoder (226) for decoding the time sequence of the selected resonant frequencies for recovering the predetermined identification code.
Abstract: An RF tagging system which provides a large number of potential identification codes without increasing the physical size of RF tags used therein includes a plurality of RF tags (20, 90, 140, 230, 250) and an external reader (200). Each RF tag includes at least one resonant circuit (22, 92, 142, 231, 251) which is resonant at any one of a plurality of different frequencies, a receiver (34, 102, 152,244, 264) for receiving an interrogation signal, and a control (36,104,154,246, 266) responsive to receipt of an interrogation signal for causing its at least one resonant circuit to be resonant at selected ones of the different frequencies in a predetermined time sequence corresponding to a predetermined identification code. The external reader includes a detector (216, 218, 220, 222) for detecting the selected resonant frequencies of the RF tags and a decoder (226) for decoding the time sequence of the selected resonant frequencies for recovering the predetermined identification code.

Journal Article•DOI•
01 Dec 1994
TL;DR: Low-power design techniques are used throughout the entire design, including dynamically powered down execution units, resulting in workstation level performance packed into a low-power, low-cost design ideal for notebooks and desktop computers.
Abstract: A 28 mW/MHz at 80 MHz structured-custom RISC microprocessor design is described. This 32-b implementation of the PowerPC architecture is fabricated in a 3.3 V, 0.5 /spl mu/m, 4-level metal CMOS technology, resulting in 1.6 million transistors in a 7.4 mm by 11.5 mm chip size. Dual 8-kilobyte instruction and data caches coupled to a high performance 32/64-b system bus and separate execution units (float, integer, loadstore, and system units) result in peak instruction rates of three instructions per clock cycle. Low-power design techniques are used throughout the entire design, including dynamically powered down execution units. Typical power dissipation is kept under 2.2 W at 80 MHz. Three distinct levels of software-programmable, static, low-power operation-for system power management are offered, resulting in standby power dissipation from 2 mW to 350 mW. CPU to bus clock ratios of 1/spl times/, 2/spl times/, 3/spl times/, and 4/spl times/ are implemented to allow control of system power while maintaining processor performance. As a result, workstation level performance is packed into a low-power, low-cost design ideal for notebooks and desktop computers. >

Patent•
Paul T. Lin1•
05 Jul 1994
TL;DR: In this paper, a semiconductor die is shielded from electromagnetic interference by a combination of a reference plane (22) of a circuitized substrate (12) and two different encapsulants.
Abstract: A semiconductor (30) is shielded from electromagnetic interference by a combination of a reference plane (22) of a circuitized substrate (12) and two different encapsulants. The first encapsulant (38) is an electrically insulative encapsulant which mechanically protects a semiconductor die (32). The first encapsulant is constrained by a dam structure (40) so as not to encapsulate conductive reference pads (18) which are electrically connected to the reference plane by conductive vias (20). A second encapsulant (42) is dispensed over the first encapsulant and is in contact with the reference pads. The second encapsulant is an electrically conductive encapsulant, and is preferably made of a precursor material having the same or similar properties as that of the first encapsulant, but is filled with conductive filler particles to establish electrical conductivity of the encapsulant. Accordingly, the semiconductor die is effectively shielded from both the top and bottom by the electrically conductive encapsulant and the reference plane.

Journal Article•DOI•
TL;DR: In this paper, the authors used a thermal decomposition of the precursors via elimination of SiMe{sub 3}F and SiMe[sub 3]Cl at 400-500 degrees C.
Abstract: New unimolecular carbon-nitride precursors such as C{sub 3}N{sub 3}F{sub 2}N(SiMe{sub 3}){sub 2} and C{sub 3}N{sub 3}Cl{sub 2}N(SiMe{sub 3}){sub s} were synthesized and used to deposit thin films of composition C{sub 3}N{sub 4}-C{sub 3.2}N{sub 4}, the highest nitrogen content observed in C-N solids. The films were formed by the thermal decomposition of the precursors via elimination of SiMe{sub 3}F and SiMe{sub 3}Cl at 400-500 {degrees}C. Film thicknesses between 1200 and 4000 {Angstrom} were deposited on (100) Si, graphite, beryllium, and SiO{sub 2}, and were extensively characterized for composition and chemical purity using RBS, energy-dispersive X-ray analysis, and SIMS. The material was amorphous as indicated by X-ray diffraction. IR, EELS, and {sub 13}C NMR reveal substantial sp{sup 2} hybridization in both the carbon and the nitrogen. This material should be an excellent precursor for the high-pressure synthesis of C{sub 3}N{sub 4}, the highly sought structural and compositional analog of Si{sub 3}N{sub 4}. 12 refs., 4 figs.

Journal Article•DOI•
K. Joardar1•
TL;DR: In this paper, a simple engineering approach for rapid simulation of cross-talk in mixed-mode IC's using SPICE is presented, which shows that while an SOI-based process provides high isolation from crosstalk at low operating frequencies, its benefit is lost at high frequencies.
Abstract: A simple engineering approach for rapid simulation of cross-talk in mixed-mode IC's using SPICE is presented. A side-by-side comparison of several cross-talk reduction schemes has shown that while an SOI-based process provides high isolation from cross-talk at low operating frequencies, its benefit is lost at high frequencies. Simple guard ring substrate contacts appear to be the technique best suited for preventing cross-talk at high operating frequencies. Lumped parameter equivalent circuits have also been developed to represent different isolation schemes in SPICE. The isolation characteristics of test structures employing the above techniques are computed using SPICE and the results compared with two-dimensional device simulation. The results are also compared with experimental measurements on actual silicon to validate the models. >

Patent•
Paul T. Lin1, Michael B. McShane1•
10 Jan 1994
TL;DR: In this article, a thermally enhanced semiconductor device with exposed backside is described, where the inactive backside can also be coupled to a heat sink for increased thermal dissipation.
Abstract: A thermally enhanced semiconductor device (10) having an exposed backside (22) is described. In one embodiment, a PC board substrate (12) is provided having a pattern of conductive traces (14) on both upper and lower surfaces of the substrate. Electrical continuity is maintained between the two surfaces with conductive vias (16). A semiconductor die (18) is flip-mounted to the upper surface of the substrate. Solder bumps (26) electrically connect the die to the conductive traces, and an underfill (28) couples the active side (20) of the die to the upper surface of the substrate. A package body (40) is formed around the perimeter (24) of the die leaving the inactive backside exposed for enhanced thermal dissipation. The inactive backside can also be coupled to a heat sink for increased thermal dissipation. A plurality of solder balls (42) electrically connected to the conductive traces is attached to the lower surface of the substrate.

Patent•
Kuo-Tung Chang1•
04 Apr 1994
TL;DR: In this paper, an EEPROM device capable of operating with a single lowvoltage power supply includes a control gate electrode (30) and a select gate electrode(14) overlying separate portions of a channel region (32).
Abstract: An EEPROM device capable of operating with a single low-voltage power supply includes a control gate electrode (30) and a select gate electrode (14) overlying separate portions of a channel region (32). Electrical charge is stored in an ONO layer (20) overlying a portion of the channel region (32) and separating the control gate electrode (30) from the channel region (32). The memory device is programmed using source-side injection, where electrons traverse the channel region (32) and are injected into trapping sites (34) located within the silicon nitride layer (24) of the ONO layer (20). To provide the necessary field gradient within the channel region (32), the control gate electrode (30) is spaced apart from the source region (16) by the select gate electrode (14). In either of two embodiments, two layers of polysilicon are used to form the select gate electrode (14) and the control gate electrode (30). The second layer of polysilicon is formed as a sidewall spacer on the first layer of polysilicon. Accordingly, a high-density memory device is achieved.

Patent•
15 Nov 1994
TL;DR: In this paper, an electronic tag (10) receives a data message (18) that has a wake-up section (20) followed by a session section (22), and the interrogation signal which carries the data message encodes the wakeup section differently from the session section.
Abstract: An electronic tag (10) receives a data message (18) that has a wake-up section (20) followed by a session section (22). The interrogation signal which carries the data message encodes the wake-up section (20) differently from the session section (22). A power manager (28) decodes the wake-up section (20) using a very low power decoder (34) that remains energized during a standby state. When the power manager (28) detects a predetermined identification code (26), it controls a switching circuit (32) to energize a controller (30). The controller (30) may then decode, process, and respond to information conveyed during the session section (22). If the power manager (28) does not detect the identification code (26), the controller (30) remains de-energized. The power manager (28) also includes a synchronizer (38) which determines when a preamble (24) is detected, and an ID decoder (40) that determines when the wake-up section (20) conveys the predetermined identification code (26).

Patent•
Paul T. Lin1, Michael B. McShane1•
26 May 1994
TL;DR: In this paper, a ball grid array semiconductor device with a plurality of conductive traces (18), bond posts (20), and conductive vias (22) is mounted to the package substrate.
Abstract: A ball grid array semiconductor device (10) includes a package substrate (14 or 16) having a plurality of conductive traces (18), bond posts (20), and conductive vias (22). A semiconductor die (12) is mounted to the package substrate. Orthogonal wire bonds (28) are used to electrically connect staggered bond pads (26) to corresponding bond posts (20) on the substrate. A liquid encapsulant (40) is used to cover the die, the wire bonds, and portions of the package substrate. In another embodiment, a package substrate (50) includes a lower bonding tier (52) and an upper bonding tier (54). Wire bonds (60) are used to electrically connect an outer row of bond pads (64) to bond posts (20) of lower tier (52), while wire bonds (62) are used to electrically connect an inner row of bond pads (64) to bond posts (20) of an upper tier (54). The loop height of wire bonds (60) is smaller than that of wire bonds (62).

Patent•
Paul T. Lin1•
02 Sep 1994
TL;DR: In this paper, a semiconductor die is mounted over a power supply surface (24, 52, 62), and signal bonding pads are wire bonded to corresponding leads (38) of a leadframe.
Abstract: A semiconductor die (14) is mounted over a power supply surface (24, 52, 62). Signal bonding pads (18) on the die are wire bonded to corresponding leads (38) of a leadframe. Power supply bonding pads (20, 21) on the die are wire bonded to the power supply surface. A package body (22, 42, 56) surrounds the semiconductor die, the wire bonds (32, 34, 40, 40'), and the power supply surface. The power supply pad terminals are accessible from the bottom of the package body of the device through a plurality of conductive apertures (28, 56) disposed in the lower half of the package body. Power supply solder bumps (12, 58) are connected to the power supply surface inside the package body through the conductive apertures. The leads are used provide input and out signals for the device around the periphery of the device, while the solder bumps are disposed in an array format on the package body.

Proceedings Article•DOI•
D. Burnett1, K. Erington1, C. Subramanian1, K. Baker1•
07 Jun 1994
TL;DR: In this article, the impact of transistor variations on circuit performance becomes more significant as the number of transistors integrated on a circuit continues to increase, roughly doubling every 18 months, and it is shown that even in the absence of systematic variations (implant nonuniformities, Leff and Weff variations), there exists a fundamental variability in the threshold voltage V/sub T/ due to the finite number of dopant atoms in the extremely small MOSFET channel area.
Abstract: As the number of transistors integrated on a circuit continues to increase, roughly doubling every 18 months, the impact of transistor variations on circuit performance becomes more significant. Even in the absence of systematic variations (implant nonuniformities, Leff and Weff variations), there exists a fundamental variability in the threshold voltage V/sub T/ due to the finite number of dopant atoms in the extremely small MOSFET channel area. This work presents for the first time the impact of these fundamental V/sub T/ variations on SRAM cell stability and CMOS logic performance. We also analyze the impact of device scaling on these V/sub T/ variations and propose guidelines for future SRAM cell design. >

Patent•
Marc C. Naddell1, Gary W. Grube1•
31 Mar 1994
TL;DR: In this paper, the available services from a radio frequency communication system (RF communication system) are transmitted by the RF communication system on an RF communication resource (RRC resource) to at least one communication unit (108).
Abstract: Information regarding available services from a RF communication system (101) is transmitted by the RF communication system on an RF communication resource(109). The information is received by at least one communication unit (108). The at least one communication unit (108) determines, from the information, the available services. The at least one communication unit (108) displays an indication of the available services on a display (206) for a user.

Patent•
Zancho William F1•
29 Dec 1994
TL;DR: In this paper, an application device (401) is connectable with a donor device (541) such as a portable memory card (560) or widely accessible central database (550).
Abstract: An application device (401) is connectable with a donor device (541) such as a portable memory card (560) or widely accessible central database (550). The donor device (541) stores and provides preferences to the application device (401). The donor device (541) contains a reference preference memory capable of storing preferences for a particular user. A controller (450) accesses the donor device, when the donor device is available, to obtain preferences that pertain to the particular user under certain conditions and stores preferences obtained from the donor device in the session preference memory (490) of the application device (401) for use in a session by the particular user. When the donor device is unavailable, alternate preference establishment procedures are used.

Patent•
23 Apr 1994
TL;DR: In this paper, an efficient real-time authentication method and apparatus are provided for maintaining secure packet data communications through an encryption process by utilizing a packetized message encryption key (502) and a unique packet number (504) as encryption variables.
Abstract: Radio frequency based cellular telecommunication systems often require both subscriber units (100) and communication units (130) of a fixed network communication system to maintain secret data which may be used to verify authenticity as well as provide encrypting variables for message encryption processes. An efficient real-time authentication method and apparatus are provided which use a single message (210) to provide authentication and communication link setup information. Further, an authentication method and apparatus are provided which uses instant-specific information such as a time of day, radio frequency carrier frequency, a time slot number, a radio port number, access manager identifier, a radio port control unit identifier, or a base site controller identifier to enhance the reliability of the authentication process. Furthermore, a method and apparatus are provided for maintaining secure packet data communications through an encryption process by utilizing a packetized message encryption key (502) and a unique packet number (504) as encryption variables.

Patent•
29 Aug 1994
TL;DR: In this article, a RF communication device (100, 200, 300, 300) employs a mirrored surface (109, 209, 309), which contains a display area (108, 208) that may be used to output operational information of the RF communication devices (100 and 200) such as signal strength and status information.
Abstract: A RF communication device (100, 200, 300) employs a mirrored surface (109, 209, 309). The mirrored surface (109, 209) contains a display area (108, 208) that may be used to output operational information of the RF communication device (100, 200), such as signal strength and status information, to a user.

Patent•
Perry Theresa S1, Pamela Ann Dillard1•
23 Jun 1994
TL;DR: In this paper, a radiotelephone is adapted to generate a plurality of distinctive vibrating alert patterns when the incoming telephone call signal (121) is received, which can be assigned to a particular vibrating signal.
Abstract: A radiotelephone (101) is adapted to generate a plurality of distinctive vibrating alert patterns. An antenna (201) receives radio frequency (RF) signals including an incoming telephone call signal (121). A receiver (205), operably coupled to the antenna (201), receives the incoming telephone call signal (121). A vibrating alert generator (223) generates a vibrating alert pattern when enabled. A controller (215), operably coupled to the receiver (205) and the vibrating alert generator (223), enables the vibrating alert generator (223) to generate the vibrating alert pattern (301) as one of a plurality of distinctive vibrating alert patterns (301-312) when the incoming telephone call signal (121) is received. The present invention advantageously permits the user or the radiotelephone system (100) to select a preferred distinctive vibrating alert pattern (301), or to assign a particular distinctive vibrating alert pattern (301) to a particular incoming telephone call signal (121).

Patent•
05 Dec 1994
TL;DR: In this paper, a pad array carrier is manufactured using a substrate having metal on only one side and unplated through-holes, and a semiconductor die is mounted on and affixed to the top surface of the substrate with an electrically insulative adhesive.
Abstract: Pad array carriers allow greater I/O densities over conventional leaded packages by using an array arrangement for external electrical connections. A pad array carrier (48) is manufactured using a substrate (40) having metal on only one side and unplated through-holes (44). A semiconductor die (50) is mounted on and affixed to the top surface of the substrate with an electrically insulative adhesive (51). The use of the insulative adhesive allows routing of signal traces into the die mounting region directly underneath the die. Wire bonds (52) connect the die to metal traces (46) on the substrate. A package body (54) is formed on the substrate covering the die and wire bonds (52). Solder balls (56 & 58) are directly attached to the backside of the solder pads (47) by way of the through-holes.

Patent•
04 Jan 1994
TL;DR: In this paper, an integrated circuit substrate (26) is formed with active circuit elements (24, 32) on first and second surfaces of the substrate to minimize signal routing and reduce propagation delay.
Abstract: An integrated circuit substrate (26) is formed with active circuit elements (24, 32) on first and second surfaces of the substrate. The active circuit elements are interconnected with though-substrate vias (28) to minimize signal routing and reduce propagation delay. The through-substrate vias may be formed with a plurality of holes (52) through the IC substrate. A dielectric layer (54) is deposited on the surface of the IC substrate and through the holes. A conductive layer (56) is deposited through the holes to form the through-substrate vias. The dielectric layer is removed from the surface of the IC substrate to leave the through-substrate vias isolated from the IC substrate by the dielectric layer. A second substrate (26) is formed as described and the two substrates are joined as a two-sided chip (21) with active circuit elements on both sides interconnected by through-substrate vias.