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Institution

Motorola

CompanySchaumburg, Illinois, United States
About: Motorola is a company organization based out in Schaumburg, Illinois, United States. It is known for research contribution in the topics: Signal & Communications system. The organization has 27298 authors who have published 38274 publications receiving 968710 citations. The organization is also known as: Motorola, Inc. & Galvin Manufacturing Corporation.


Papers
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Book ChapterDOI
Paul Baker1, Shiou Loh1, Frank Weil1
02 Oct 2005
TL;DR: The experiences within Motorola in deploying a top-down approach to MDE for more than 15 years are presented and some of the key competencies that have been developed and the impact of MDE within the organization are described.
Abstract: In an ongoing effort to reduce development costs in spite of increasing system complexity, Motorola has been a long-time adopter of Model-Driven Engineering (MDE) practices. The foundation of this approach is the creation of rigorous models throughout the development process, thereby enabling the introduction of automation. In this paper we present our experiences within Motorola in deploying a top-down approach to MDE for more than 15 years. We describe some of the key competencies that have been developed and the impact of MDE within the organization. Next we present some of the main issues encountered during MDE deployment, together with some possible resolutions.

201 citations

Patent
Janos Farkas1, Rajeev Bajaj1, Melissa Freeman1, David K. Watts1, Sanjit Das1 
20 Oct 1997
TL;DR: In this paper, a two-step CMP process is used to polish exposed portions of the dielectric layer and then a second CMP was used to finish off the exposed exposed portions.
Abstract: A method for forming a copper interconnect on an integrated circuit (IC) begins by forming a dielectric layer (20) having an opening. A tantalum-based barrier layer (21), such as TaN or TaSiN, is formed within the opening in the layer (20). A copper layer (22) is formed over the barrier layer (21). A first CMP process is used to polish the copper (22) to expose portions of the barrier (21). A second CMP process which is different from the first CMP process is then used to polish exposed portions of the layer (21) faster than the dielectric layer (20) or the copper layer (22). After this two-step CMP process, a copper interconnect having a tantalum-based barrier is formed across the integrated circuit substrate (12).

201 citations

Patent
29 Feb 1988
TL;DR: In this paper, a method to dynamically allocate a number of data channels on a trunked radio system (100) is presented, where the data activity is monitored during a predetermined time interval.
Abstract: Disclosed is a method to dynamically allocate a number of data channels on a trunked radio system (100). The data activity is monitored during a predetermined time interval. If activity is above a predetermined maximum, an additional channel may be reserved for data use. Conversely, if data traffic is low, a data channel may be reallocated for voice message use. Moreover, should the amount of data traffic among the available data channels be unbalanced, the present method contemplates reassigning subscriber units (114 or 116) to the available data channels to balance the data traffic load, thereby providing superior access time and system performance.

201 citations

Journal ArticleDOI
TL;DR: The experiment investigates software maintenance scenarios that employ various design patterns and compares designs with patterns to simpler alternatives and concludes that, unless there is a clear reason to prefer the simpler solution, it is probably wise to choose the flexibility provided by the design pattern.
Abstract: Software design patterns package proven solutions to recurring design problems in a form that simplifies reuse. We are seeking empirical evidence whether using design patterns is beneficial. In particular, one may prefer using a design pattern even if the actual design problem is simpler than that solved by the pattern, i.e., if not all of the functionality offered by the pattern is actually required. Our experiment investigates software maintenance scenarios that employ various design patterns and compares designs with patterns to simpler alternatives. The subjects were professional software engineers. In most of our nine maintenance tasks, we found positive effects from using a design pattern: either its inherent additional flexibility was achieved without requiring more maintenance time or maintenance time was reduced compared to the simpler alternative. In a few cases, we found negative effects: the alternative solution was less error-prone or required less maintenance time. Overall, we conclude that, unless there is a clear reason to prefer the simpler solution, it is probably wise to choose the flexibility provided by the design pattern because unexpected new requirements often appear. We identify several questions for future empirical research.

200 citations

Patent
Kuo-Tung Chang1
04 Apr 1994
TL;DR: In this paper, an EEPROM device capable of operating with a single lowvoltage power supply includes a control gate electrode (30) and a select gate electrode(14) overlying separate portions of a channel region (32).
Abstract: An EEPROM device capable of operating with a single low-voltage power supply includes a control gate electrode (30) and a select gate electrode (14) overlying separate portions of a channel region (32). Electrical charge is stored in an ONO layer (20) overlying a portion of the channel region (32) and separating the control gate electrode (30) from the channel region (32). The memory device is programmed using source-side injection, where electrons traverse the channel region (32) and are injected into trapping sites (34) located within the silicon nitride layer (24) of the ONO layer (20). To provide the necessary field gradient within the channel region (32), the control gate electrode (30) is spaced apart from the source region (16) by the select gate electrode (14). In either of two embodiments, two layers of polysilicon are used to form the select gate electrode (14) and the control gate electrode (30). The second layer of polysilicon is formed as a sidewall spacer on the first layer of polysilicon. Accordingly, a high-density memory device is achieved.

200 citations


Authors

Showing all 27298 results

NameH-indexPapersCitations
Georgios B. Giannakis137132173517
Yonggang Huang13679769290
Chenming Hu119129657264
Theodore S. Rappaport11249068853
Chang Ming Li9789642888
John Kim9040641986
James W. Hicks8940651636
David Blaauw8775029855
Mark Harman8350629118
Philippe Renaud7777326868
Aggelos K. Katsaggelos7694626196
Min Zhao7154724549
Weidong Shi7052816368
David Pearce7034225680
Douglas L. Jones7051221596
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20232
20229
202129
2020131
2019134
2018144