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Institution

Motorola

CompanySchaumburg, Illinois, United States
About: Motorola is a company organization based out in Schaumburg, Illinois, United States. It is known for research contribution in the topics: Signal & Communications system. The organization has 27298 authors who have published 38274 publications receiving 968710 citations. The organization is also known as: Motorola, Inc. & Galvin Manufacturing Corporation.


Papers
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Patent
Jheroen P. Dorenbosch1
23 Jun 2000
TL;DR: In this article, a communication network (200, 300 ) stores (502 ) location information for the communication network and a portable device (100 ) determines whether the portable device is in motion.
Abstract: A communication network ( 200, 300 ) stores ( 502 ) location information for the communication network. A portable device ( 100 ) determines ( 504 ) whether the portable device is in motion. The portable device requests ( 510 ) the location information only when the portable device determines itself not to be in motion. The network sends ( 512 ) the location information to the portable device, in response to the request for the location information from the portable unit.

195 citations

Patent
16 Jun 1997
TL;DR: In this paper, a network navigation system is provided to perform machine-readable data reading associated with an article of mail, and determining an electronic address based upon the machinereadable data.
Abstract: A network navigation method includes steps of reading machine-readable data (14) associated with an article of mail (12), and determining an electronic address (20) based upon the machine-readable data (14). A network navigation system is provided to perform the aforementioned steps.

195 citations

Patent
26 May 1994
TL;DR: In this paper, a ball grid array semiconductor device with a plurality of conductive traces (18), bond posts (20), and conductive vias (22) is mounted to the package substrate.
Abstract: A ball grid array semiconductor device (10) includes a package substrate (14 or 16) having a plurality of conductive traces (18), bond posts (20), and conductive vias (22). A semiconductor die (12) is mounted to the package substrate. Orthogonal wire bonds (28) are used to electrically connect staggered bond pads (26) to corresponding bond posts (20) on the substrate. A liquid encapsulant (40) is used to cover the die, the wire bonds, and portions of the package substrate. In another embodiment, a package substrate (50) includes a lower bonding tier (52) and an upper bonding tier (54). Wire bonds (60) are used to electrically connect an outer row of bond pads (64) to bond posts (20) of lower tier (52), while wire bonds (62) are used to electrically connect an inner row of bond pads (64) to bond posts (20) of an upper tier (54). The loop height of wire bonds (60) is smaller than that of wire bonds (62).

195 citations

Patent
16 Mar 2005
TL;DR: In this article, a user interface for an electronic device (and corresponding method) is arranged and constructed for intuitive control of interface functionality, including a speaker, microphone, display backlighting, etc., that is one of a plurality of user interface components.
Abstract: A user interface (103) for an electronic device (101) (and corresponding method) is arranged and constructed for intuitive control of interface functionality. The user interface includes: a user interface component, e.g. speaker, microphone, display backlighting, etc., that is one of a plurality of user interface components (105); interface circuitry (117) coupled to the user interface components (105); and a sensor (129) located in a position that is logically associated with, e.g. proximate to or co-located with, the user interface component and configured to provide an output signal when the sensor (129) is triggered, e.g. by proximity to a user, where the output signal facilitates, via for example a controller (143), a change in an operating mode of one or more of the user interface components (105).

195 citations

Journal ArticleDOI
TL;DR: In this paper, a low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated.
Abstract: A low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm/sup 2/ 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-/spl mu/m CMOS process utilizing five layers of metal and two layers of poly.

195 citations


Authors

Showing all 27298 results

NameH-indexPapersCitations
Georgios B. Giannakis137132173517
Yonggang Huang13679769290
Chenming Hu119129657264
Theodore S. Rappaport11249068853
Chang Ming Li9789642888
John Kim9040641986
James W. Hicks8940651636
David Blaauw8775029855
Mark Harman8350629118
Philippe Renaud7777326868
Aggelos K. Katsaggelos7694626196
Min Zhao7154724549
Weidong Shi7052816368
David Pearce7034225680
Douglas L. Jones7051221596
Network Information
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20232
20229
202129
2020131
2019134
2018144