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Institution

Narula Institute of Technology

About: Narula Institute of Technology is a based out in . It is known for research contribution in the topics: Quantum dot cellular automaton & Cognitive radio. The organization has 288 authors who have published 490 publications receiving 2258 citations. The organization is also known as: NiT.


Papers
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Book ChapterDOI
01 Jan 2019
TL;DR: In this paper, the nonlinear dynamics of two speech signals having two different emotions were investigated using recurrence analysis, and a marked distinction was visually observed between the normal and the angry emotion-based signals from the recurrence and the phase space plots.
Abstract: The current study was an attempt to understand the dynamics of emotional speech signals. The nonlinear dynamics of two speech signals having two different emotions were investigated using recurrence analysis. First, two types of speech signals were collected when the subject spoke eight sentences in the Bengali language in angry and normal emotion. The recurrence plot and the phase space plot were constructed for each signal and recurrence-based features, namely %isometry and %consecutive isometry were extracted. A marked distinction was visually observed between the normal and the angry emotion-based signals from the recurrence and the phase space plots. The variation was further confirmed from the values of the recurrence parameters. The normal emotion exhibited higher %isometry and %consecutive isometry as compared to the angry emotion. The robustness of the recurrence-based method for classifying the emotional states was established from the consistency of the results provided by the recurrence parameters in both noise-free and noisy environments.

1 citations

Book ChapterDOI
01 Jan 2019
TL;DR: The proposed biopotential amplifier exhibits a comprehensive capability to be used for controlling svEMG-based assistive devices, and is classified using multilayer perceptron (MLP) artificial neural networks.
Abstract: In the technologically advancing global network, the seamless integration of the capabilities of the assistive technology for improving the physical mobility of the physically challenged individuals has led to the development of new medical devices over the last few decades. The mobility impairment makes the proactive participation of an individual more herculean in necessary events. In the worst scenario, it prevents the active contribution of the individual. Globally, the utilization of biosignals to control the assistive devices has become the gravitating research. The current study discusses the designing and the development of a biopotential amplifier for the acquisition of subvocal electromyogram (svEMG) signals for assistive device control. The svEMG signals were acquired and processed using a single channel biopotential amplifier. Subsequently, the statistical parameters were calculated. The statistical parameters of the signals were analyzed using various statistical methods and classified using multilayer perceptron (MLP) artificial neural networks. Among the various networks, MLP 5-7-4 network attained a maximum classification efficiency of 97.5%. Thus the proposed biopotential amplifier exhibits a comprehensive capability to be used for controlling svEMG-based assistive devices.

1 citations

Journal ArticleDOI
07 Sep 2015
TL;DR: In this paper, the authors performed energy and radiative decays for several highly charge states of sulphur in order to identify experimental lines associated to double excited KK atomic states.
Abstract: Calculation of energies and radiative decays was performed for several highly charge states of sulphur in order to identify experimental lines associated to double excited KK atomic states.

1 citations

Book ChapterDOI
01 Jan 2012
TL;DR: An enhanced version of AODV including trust and reputation that will ensure the transmission of messages in a secure way avoiding wormhole attackers in the network is developed and results show the effectiveness of the proposal against wormhole attack in A ODV.
Abstract: This research aims to develop an enhanced version of AODV including trust and reputation that will ensure the transmission of messages in a secure way avoiding wormhole attackers in the network. Firstly, wormhole attackers are identified depending on their transmission related misbehavior with respect to other nodes in the network. Next, appropriate trust value is assigned to the misbehaving nodes. Furthermore the measure of trust is calculated by considering the past interaction between the considered node with other nodes in terms of direct and indirect interactions and related trust values. Finally, the trust evaluating node takes the decision to include or not to include the trustee node in discovered route and secures the path from wormhole attacker. The key concept to interpret the misbehavior of a node is based on its responsiveness towards incoming route requests in terms of associated processing time, latency, threshold time duration. To facilitate the trust computation and respective decision, the enhanced version assigns the tasks to different functional components: Context Analyser, Event Analyser, Trust Manager, Trust Repository, Notifier, Decision Manager, Trust Engine and Node Manager. Our analysis and simulation results show the effectiveness of our proposal against wormhole attack in AODV.

1 citations

Journal ArticleDOI
TL;DR: Compared to recent literature in the relevant area, the work presented in this paper is also meet the high speed and low power VLSI circuit applications.
Abstract: This paper presents the design of dynamic CMOS PLA for high speed and low power VLSI circuit applications. The design has been carried out based on NOR function. The PLA has been implemented to realize 3 input logic functions using MOS transistor having channel length of 150nm . The circuit is simulated with the help of T-SPICE tools. According to ITRS currently VLSI circuits are designed at power supply voltage (VDD) of ≤ 1 V. In this paper the PLA has been simulated at VDD of 1 V. However the overall power consumption and gate delay of the circuit has been reported for the VDD from 0.5-1.2 V. The power consumption and gate delay of the order of nW and PS respectively. Compared to recent literature in the relevant area our work presented in this paper is also meet the high speed and low power VLSI circuit applications.

1 citations


Authors

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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
202233
202142
202076
201939
201828
201736